--- /dev/null
+From 8d8258bdab735d9f3c4b78e091ecfbb2b2b1f2ca Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Fri, 17 Nov 2017 16:41:16 +0800
+Subject: drm/amd/pp: fix typecast error in powerplay.
+
+From: Rex Zhu <Rex.Zhu@amd.com>
+
+commit 8d8258bdab735d9f3c4b78e091ecfbb2b2b1f2ca upstream.
+
+resulted in unexpected data truncation
+
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
+@@ -850,9 +850,9 @@ static int init_over_drive_limits(
+ const ATOM_Tonga_POWERPLAYTABLE *powerplay_table)
+ {
+ hwmgr->platform_descriptor.overdriveLimit.engineClock =
+- le16_to_cpu(powerplay_table->ulMaxODEngineClock);
++ le32_to_cpu(powerplay_table->ulMaxODEngineClock);
+ hwmgr->platform_descriptor.overdriveLimit.memoryClock =
+- le16_to_cpu(powerplay_table->ulMaxODMemoryClock);
++ le32_to_cpu(powerplay_table->ulMaxODMemoryClock);
+
+ hwmgr->platform_descriptor.minOverdriveVDDC = 0;
+ hwmgr->platform_descriptor.maxOverdriveVDDC = 0;
--- /dev/null
+From b43aaee69d4327d05e7624d9471c17d015b4d67d Mon Sep 17 00:00:00 2001
+From: Leo Liu <leo.liu@amd.com>
+Date: Tue, 21 Nov 2017 09:08:07 -0500
+Subject: drm/amdgpu: move UVD/VCE and VCN structure out from union
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Leo Liu <leo.liu@amd.com>
+
+commit b43aaee69d4327d05e7624d9471c17d015b4d67d upstream.
+
+With the enablement of VCN Dec and Enc from user space, User space queries
+kernel for the IP information, if HW has UVD/VCE, the info comes from these
+IP blocks, but this could end up mis-interpret for VCN when they are in the
+union, the other way same when HW with VCN block.
+
+Signed-off-by: Leo Liu <leo.liu@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Fixes: 95d0906f8506 ("drm/amdgpu: add initial vcn support and decode tests")
+Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu.h | 16 ++++++----------
+ 1 file changed, 6 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+@@ -1536,18 +1536,14 @@ struct amdgpu_device {
+ /* sdma */
+ struct amdgpu_sdma sdma;
+
+- union {
+- struct {
+- /* uvd */
+- struct amdgpu_uvd uvd;
++ /* uvd */
++ struct amdgpu_uvd uvd;
+
+- /* vce */
+- struct amdgpu_vce vce;
+- };
++ /* vce */
++ struct amdgpu_vce vce;
+
+- /* vcn */
+- struct amdgpu_vcn vcn;
+- };
++ /* vcn */
++ struct amdgpu_vcn vcn;
+
+ /* firmwares */
+ struct amdgpu_firmware firmware;
--- /dev/null
+From 2642cf110d08a403f585a051e4cbf45a90b3adea Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Fri, 13 Oct 2017 17:24:31 +0200
+Subject: drm/amdgpu: reserve root PD while releasing it
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 2642cf110d08a403f585a051e4cbf45a90b3adea upstream.
+
+Otherwise somebody could try to evict it at the same time and try to use
+half torn down structures.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 13 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+@@ -2586,7 +2586,8 @@ void amdgpu_vm_fini(struct amdgpu_device
+ {
+ struct amdgpu_bo_va_mapping *mapping, *tmp;
+ bool prt_fini_needed = !!adev->gart.gart_funcs->set_prt;
+- int i;
++ struct amdgpu_bo *root;
++ int i, r;
+
+ amd_sched_entity_fini(vm->entity.sched, &vm->entity);
+
+@@ -2609,7 +2610,15 @@ void amdgpu_vm_fini(struct amdgpu_device
+ amdgpu_vm_free_mapping(adev, vm, mapping, NULL);
+ }
+
+- amdgpu_vm_free_levels(&vm->root);
++ root = amdgpu_bo_ref(vm->root.bo);
++ r = amdgpu_bo_reserve(root, true);
++ if (r) {
++ dev_err(adev->dev, "Leaking page tables because BO reservation failed\n");
++ } else {
++ amdgpu_vm_free_levels(&vm->root);
++ amdgpu_bo_unreserve(root);
++ }
++ amdgpu_bo_unref(&root);
+ dma_fence_put(vm->last_dir_update);
+ for (i = 0; i < AMDGPU_MAX_VMHUBS; i++)
+ amdgpu_vm_free_reserved_vmid(adev, vm, i);
--- /dev/null
+From 89ce6e0afee8eafa679093207dabd717af9d09c5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com>
+Date: Wed, 22 Nov 2017 15:55:21 +0100
+Subject: drm/amdgpu: Set adev->vcn.irq.num_types for VCN
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Michel Dänzer <michel.daenzer@amd.com>
+
+commit 89ce6e0afee8eafa679093207dabd717af9d09c5 upstream.
+
+We were setting adev->uvd.irq.num_types instead.
+
+Fixes: 9b257116e784 ("drm/amdgpu: add vcn enc irq support")
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+@@ -1175,7 +1175,7 @@ static const struct amdgpu_irq_src_funcs
+
+ static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev)
+ {
+- adev->uvd.irq.num_types = adev->vcn.num_enc_rings + 1;
++ adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 1;
+ adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
+ }
+
--- /dev/null
+From 9271c0ca573e02a360b636ecd8cb408852f4e9f6 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Wed, 8 Nov 2017 17:25:04 +0200
+Subject: drm/edid: Don't send non-zero YQ in AVI infoframe for HDMI 1.x sinks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit 9271c0ca573e02a360b636ecd8cb408852f4e9f6 upstream.
+
+Apparently some sinks look at the YQ bits even when receiving RGB,
+and they get somehow confused when they see a non-zero YQ value.
+So we can't just blindly follow CEA-861-F and set YQ to match the
+RGB range.
+
+Unfortunately there is no good way to tell whether the sink
+designer claims to have read CEA-861-F. The CEA extension block
+revision number has generally been stuck at 3 since forever,
+and even a very recently manufactured sink might be based on
+an old design so the manufacturing date doesn't seem like
+something we can use. In lieu of better information let's
+follow CEA-861-F only for HDMI 2.0 sinks, since HDMI 2.0 is
+based on CEA-861-F. For HDMI 1.x sinks we'll always set YQ=0.
+
+The alternative would of course be to always set YQ=0. And if
+we ever encounter a HDMI 2.0+ sink with this bug that's what
+we'll probably have to do.
+
+Cc: Jani Nikula <jani.nikula@intel.com>
+Cc: Eric Anholt <eric@anholt.net>
+Cc: Neil Kownacki <njkkow@gmail.com>
+Reported-by: Neil Kownacki <njkkow@gmail.com>
+Tested-by: Neil Kownacki <njkkow@gmail.com>
+Fixes: fcc8a22cc905 ("drm/edid: Set YQ bits in the AVI infoframe according to CEA-861-F")
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101639
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171108152504.12596-1-ville.syrjala@linux.intel.com
+Acked-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_edid.c | 12 ++++++++++--
+ drivers/gpu/drm/i915/intel_hdmi.c | 3 ++-
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++-
+ include/drm/drm_edid.h | 3 ++-
+ 4 files changed, 16 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/drm_edid.c
++++ b/drivers/gpu/drm/drm_edid.c
+@@ -4809,7 +4809,8 @@ void
+ drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
+ const struct drm_display_mode *mode,
+ enum hdmi_quantization_range rgb_quant_range,
+- bool rgb_quant_range_selectable)
++ bool rgb_quant_range_selectable,
++ bool is_hdmi2_sink)
+ {
+ /*
+ * CEA-861:
+@@ -4833,8 +4834,15 @@ drm_hdmi_avi_infoframe_quant_range(struc
+ * YQ-field to match the RGB Quantization Range being transmitted
+ * (e.g., when Limited Range RGB, set YQ=0 or when Full Range RGB,
+ * set YQ=1) and the Sink shall ignore the YQ-field."
++ *
++ * Unfortunate certain sinks (eg. VIZ Model 67/E261VA) get confused
++ * by non-zero YQ when receiving RGB. There doesn't seem to be any
++ * good way to tell which version of CEA-861 the sink supports, so
++ * we limit non-zero YQ to HDMI 2.0 sinks only as HDMI 2.0 is based
++ * on on CEA-861-F.
+ */
+- if (rgb_quant_range == HDMI_QUANTIZATION_RANGE_LIMITED)
++ if (!is_hdmi2_sink ||
++ rgb_quant_range == HDMI_QUANTIZATION_RANGE_LIMITED)
+ frame->ycc_quantization_range =
+ HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
+ else
+--- a/drivers/gpu/drm/i915/intel_hdmi.c
++++ b/drivers/gpu/drm/i915/intel_hdmi.c
+@@ -481,7 +481,8 @@ static void intel_hdmi_set_avi_infoframe
+ crtc_state->limited_color_range ?
+ HDMI_QUANTIZATION_RANGE_LIMITED :
+ HDMI_QUANTIZATION_RANGE_FULL,
+- intel_hdmi->rgb_quant_range_selectable);
++ intel_hdmi->rgb_quant_range_selectable,
++ is_hdmi2_sink);
+
+ /* TODO: handle pixel repetition for YCBCR420 outputs */
+ intel_write_infoframe(encoder, crtc_state, &frame);
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -433,7 +433,8 @@ static void vc4_hdmi_set_avi_infoframe(s
+ vc4_encoder->limited_rgb_range ?
+ HDMI_QUANTIZATION_RANGE_LIMITED :
+ HDMI_QUANTIZATION_RANGE_FULL,
+- vc4_encoder->rgb_range_selectable);
++ vc4_encoder->rgb_range_selectable,
++ false);
+
+ vc4_hdmi_write_infoframe(encoder, &frame);
+ }
+--- a/include/drm/drm_edid.h
++++ b/include/drm/drm_edid.h
+@@ -360,7 +360,8 @@ void
+ drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
+ const struct drm_display_mode *mode,
+ enum hdmi_quantization_range rgb_quant_range,
+- bool rgb_quant_range_selectable);
++ bool rgb_quant_range_selectable,
++ bool is_hdmi2_sink);
+
+ /**
+ * drm_eld_mnl - Get ELD monitor name length in bytes.
--- /dev/null
+From 52dd06506e9bbc2a37b352df7dfc5468f8da21fd Mon Sep 17 00:00:00 2001
+From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Date: Tue, 28 Nov 2017 12:16:03 +0100
+Subject: drm/fb_helper: Disable all crtc's when initial setup fails.
+
+From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+
+commit 52dd06506e9bbc2a37b352df7dfc5468f8da21fd upstream.
+
+Some drivers like i915 start with crtc's enabled, but with deferred
+fbcon setup they were no longer disabled as part of fbdev setup.
+Headless units could no longer enter pc3 state because the crtc was
+still enabled.
+
+Fix this by calling restore_fbdev_mode when we would have called
+it otherwise once during initial fbdev setup.
+
+Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Fixes: ca91a2758fce ("drm/fb-helper: Support deferred setup")
+Reported-by: Thomas Voegtle <tv@lio96.de>
+Tested-by: Thomas Voegtle <tv@lio96.de>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171128111603.62757-1-maarten.lankhorst@linux.intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_fb_helper.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/drm_fb_helper.c
++++ b/drivers/gpu/drm/drm_fb_helper.c
+@@ -1809,6 +1809,10 @@ static int drm_fb_helper_single_fb_probe
+
+ if (crtc_count == 0 || sizes.fb_width == -1 || sizes.fb_height == -1) {
+ DRM_INFO("Cannot find any crtc or sizes\n");
++
++ /* First time: disable all crtc's.. */
++ if (!fb_helper->deferred_setup && !READ_ONCE(fb_helper->dev->master))
++ restore_fbdev_mode(fb_helper);
+ return -EAGAIN;
+ }
+
--- /dev/null
+From daee54263c1202cbdab85c5e15ae30b417602efb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 10 Nov 2017 17:38:34 +0100
+Subject: drm/fsl-dcu: Don't set connector DPMS property
+
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+
+commit daee54263c1202cbdab85c5e15ae30b417602efb upstream.
+
+Since commit 4a97a3da420b ("drm: Don't update property values for atomic
+drivers") atomic drivers must not update property values as properties
+are read from the state instead. To catch remaining users, the
+drm_object_property_set_value() function now throws a warning when
+called by atomic drivers on non-immutable properties, and we hit that
+warning when creating connectors.
+
+The easy fix is to just remove the drm_object_property_set_value() as it
+is used here to set the initial value of the connector's DPMS property
+to OFF. The DPMS property applies on top of the connector's state crtc
+pointer (initialized to NULL) that is the main connector on/off control,
+and should thus default to ON.
+
+Fixes: 4a97a3da420b ("drm: Don't update property values for atomic drivers")
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
++++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
+@@ -102,7 +102,6 @@ static int fsl_dcu_attach_panel(struct f
+ {
+ struct drm_encoder *encoder = &fsl_dev->encoder;
+ struct drm_connector *connector = &fsl_dev->connector.base;
+- struct drm_mode_config *mode_config = &fsl_dev->drm->mode_config;
+ int ret;
+
+ fsl_dev->connector.encoder = encoder;
+@@ -122,10 +121,6 @@ static int fsl_dcu_attach_panel(struct f
+ if (ret < 0)
+ goto err_sysfs;
+
+- drm_object_property_set_value(&connector->base,
+- mode_config->dpms_property,
+- DRM_MODE_DPMS_OFF);
+-
+ ret = drm_panel_attach(panel, connector);
+ if (ret) {
+ dev_err(fsl_dev->dev, "failed to attach panel\n");
--- /dev/null
+From a2f042430784d86eb2b7a6d2a869f552da30edba Mon Sep 17 00:00:00 2001
+From: Peter Griffin <peter.griffin@linaro.org>
+Date: Tue, 15 Aug 2017 15:14:25 +0100
+Subject: drm/hisilicon: Ensure LDI regs are properly configured.
+
+From: Peter Griffin <peter.griffin@linaro.org>
+
+commit a2f042430784d86eb2b7a6d2a869f552da30edba upstream.
+
+This patch fixes the following soft lockup:
+ BUG: soft lockup - CPU#0 stuck for 23s! [weston:307]
+
+On weston idle-timeout the IP is powered down and reset
+asserted. On weston resume we get a massive vblank
+IRQ storm due to the LDI registers having lost some state.
+
+This state loss is caused by ade_crtc_atomic_begin() not
+calling ade_ldi_set_mode(). With this patch applied
+resuming from Weston idle-timeout works well.
+
+Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Reviewed-by: Xinliang Liu <xinliang.liu@linaro.org>
+Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
++++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+@@ -534,9 +534,12 @@ static void ade_crtc_atomic_begin(struct
+ {
+ struct ade_crtc *acrtc = to_ade_crtc(crtc);
+ struct ade_hw_ctx *ctx = acrtc->ctx;
++ struct drm_display_mode *mode = &crtc->state->mode;
++ struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode;
+
+ if (!ctx->power_on)
+ (void)ade_power_up(ctx);
++ ade_ldi_set_mode(acrtc, mode, adj_mode);
+ }
+
+ static void ade_crtc_atomic_flush(struct drm_crtc *crtc,
--- /dev/null
+From f3621a8eb59a913612c8e6e37d81f16b649f8b6c Mon Sep 17 00:00:00 2001
+From: Jonathan Liu <net147@gmail.com>
+Date: Mon, 7 Aug 2017 21:55:45 +1000
+Subject: drm/panel: simple: Add missing panel_simple_unprepare() calls
+
+From: Jonathan Liu <net147@gmail.com>
+
+commit f3621a8eb59a913612c8e6e37d81f16b649f8b6c upstream.
+
+During panel removal or system shutdown panel_simple_disable() is called
+which disables the panel backlight but the panel is still powered due to
+missing calls to panel_simple_unprepare().
+
+Fixes: d02fd93e2cd8 ("drm/panel: simple - Disable panel on shutdown")
+Signed-off-by: Jonathan Liu <net147@gmail.com>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170807115545.27747-1-net147@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/panel/panel-simple.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/panel/panel-simple.c
++++ b/drivers/gpu/drm/panel/panel-simple.c
+@@ -369,6 +369,7 @@ static int panel_simple_remove(struct de
+ drm_panel_remove(&panel->base);
+
+ panel_simple_disable(&panel->base);
++ panel_simple_unprepare(&panel->base);
+
+ if (panel->ddc)
+ put_device(&panel->ddc->dev);
+@@ -384,6 +385,7 @@ static void panel_simple_shutdown(struct
+ struct panel_simple *panel = dev_get_drvdata(dev);
+
+ panel_simple_disable(&panel->base);
++ panel_simple_unprepare(&panel->base);
+ }
+
+ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = {
--- /dev/null
+From 4f626a4ac8f57ddabf06d03870adab91e463217f Mon Sep 17 00:00:00 2001
+From: Roman Kapl <rka@sysgo.com>
+Date: Mon, 30 Oct 2017 11:56:13 +0100
+Subject: drm/radeon: fix atombios on big endian
+
+From: Roman Kapl <rka@sysgo.com>
+
+commit 4f626a4ac8f57ddabf06d03870adab91e463217f upstream.
+
+The function for byteswapping the data send to/from atombios was buggy for
+num_bytes not divisible by four. The function must be aware of the fact
+that after byte-swapping the u32 units, valid bytes might end up after the
+num_bytes boundary.
+
+This patch was tested on kernel 3.12 and allowed us to sucesfully use
+DisplayPort on and Radeon SI card. Namely it fixed the link training and
+EDID readout.
+
+The function is patched both in radeon and amd drivers, since the functions
+and the fixes are identical.
+
+Signed-off-by: Roman Kapl <rka@sysgo.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 38 ++++++++++++---------------
+ drivers/gpu/drm/radeon/atombios_dp.c | 38 ++++++++++++---------------
+ 2 files changed, 36 insertions(+), 40 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+@@ -1766,34 +1766,32 @@ bool amdgpu_atombios_scratch_need_asic_i
+ return true;
+ }
+
+-/* Atom needs data in little endian format
+- * so swap as appropriate when copying data to
+- * or from atom. Note that atom operates on
+- * dw units.
++/* Atom needs data in little endian format so swap as appropriate when copying
++ * data to or from atom. Note that atom operates on dw units.
++ *
++ * Use to_le=true when sending data to atom and provide at least
++ * ALIGN(num_bytes,4) bytes in the dst buffer.
++ *
++ * Use to_le=false when receiving data from atom and provide ALIGN(num_bytes,4)
++ * byes in the src buffer.
+ */
+ void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
+ {
+ #ifdef __BIG_ENDIAN
+- u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */
+- u32 *dst32, *src32;
++ u32 src_tmp[5], dst_tmp[5];
+ int i;
++ u8 align_num_bytes = ALIGN(num_bytes, 4);
+
+- memcpy(src_tmp, src, num_bytes);
+- src32 = (u32 *)src_tmp;
+- dst32 = (u32 *)dst_tmp;
+ if (to_le) {
+- for (i = 0; i < ((num_bytes + 3) / 4); i++)
+- dst32[i] = cpu_to_le32(src32[i]);
+- memcpy(dst, dst_tmp, num_bytes);
++ memcpy(src_tmp, src, num_bytes);
++ for (i = 0; i < align_num_bytes / 4; i++)
++ dst_tmp[i] = cpu_to_le32(src_tmp[i]);
++ memcpy(dst, dst_tmp, align_num_bytes);
+ } else {
+- u8 dws = num_bytes & ~3;
+- for (i = 0; i < ((num_bytes + 3) / 4); i++)
+- dst32[i] = le32_to_cpu(src32[i]);
+- memcpy(dst, dst_tmp, dws);
+- if (num_bytes % 4) {
+- for (i = 0; i < (num_bytes % 4); i++)
+- dst[dws+i] = dst_tmp[dws+i];
+- }
++ memcpy(src_tmp, src, align_num_bytes);
++ for (i = 0; i < align_num_bytes / 4; i++)
++ dst_tmp[i] = le32_to_cpu(src_tmp[i]);
++ memcpy(dst, dst_tmp, num_bytes);
+ }
+ #else
+ memcpy(dst, src, num_bytes);
+--- a/drivers/gpu/drm/radeon/atombios_dp.c
++++ b/drivers/gpu/drm/radeon/atombios_dp.c
+@@ -45,34 +45,32 @@ static char *pre_emph_names[] = {
+
+ /***** radeon AUX functions *****/
+
+-/* Atom needs data in little endian format
+- * so swap as appropriate when copying data to
+- * or from atom. Note that atom operates on
+- * dw units.
++/* Atom needs data in little endian format so swap as appropriate when copying
++ * data to or from atom. Note that atom operates on dw units.
++ *
++ * Use to_le=true when sending data to atom and provide at least
++ * ALIGN(num_bytes,4) bytes in the dst buffer.
++ *
++ * Use to_le=false when receiving data from atom and provide ALIGN(num_bytes,4)
++ * byes in the src buffer.
+ */
+ void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
+ {
+ #ifdef __BIG_ENDIAN
+- u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */
+- u32 *dst32, *src32;
++ u32 src_tmp[5], dst_tmp[5];
+ int i;
++ u8 align_num_bytes = ALIGN(num_bytes, 4);
+
+- memcpy(src_tmp, src, num_bytes);
+- src32 = (u32 *)src_tmp;
+- dst32 = (u32 *)dst_tmp;
+ if (to_le) {
+- for (i = 0; i < ((num_bytes + 3) / 4); i++)
+- dst32[i] = cpu_to_le32(src32[i]);
+- memcpy(dst, dst_tmp, num_bytes);
++ memcpy(src_tmp, src, num_bytes);
++ for (i = 0; i < align_num_bytes / 4; i++)
++ dst_tmp[i] = cpu_to_le32(src_tmp[i]);
++ memcpy(dst, dst_tmp, align_num_bytes);
+ } else {
+- u8 dws = num_bytes & ~3;
+- for (i = 0; i < ((num_bytes + 3) / 4); i++)
+- dst32[i] = le32_to_cpu(src32[i]);
+- memcpy(dst, dst_tmp, dws);
+- if (num_bytes % 4) {
+- for (i = 0; i < (num_bytes % 4); i++)
+- dst[dws+i] = dst_tmp[dws+i];
+- }
++ memcpy(src_tmp, src, align_num_bytes);
++ for (i = 0; i < align_num_bytes / 4; i++)
++ dst_tmp[i] = le32_to_cpu(src_tmp[i]);
++ memcpy(dst, dst_tmp, num_bytes);
+ }
+ #else
+ memcpy(dst, src, num_bytes);
--- /dev/null
+From ce99f7206c9105851d97202ed08c058af6f11ac4 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha@ti.com>
+Date: Thu, 12 Oct 2017 12:19:46 +0300
+Subject: drm/tilcdc: Precalculate total frametime in tilcdc_crtc_set_mode()
+
+From: Jyri Sarha <jsarha@ti.com>
+
+commit ce99f7206c9105851d97202ed08c058af6f11ac4 upstream.
+
+We need the total frame refresh time to check if we are too close to
+vertical sync when updating the two framebuffer DMA registers and risk
+a collision. This new method is more accurate that the previous that
+based on mode's vrefresh value, which itself is inaccurate or may not
+even be initialized.
+
+Reported-by: Kevin Hao <kexin.hao@windriver.com>
+Fixes: 11abbc9f39e0 ("drm/tilcdc: Set framebuffer DMA address to HW only if CRTC is enabled")
+Signed-off-by: Jyri Sarha <jsarha@ti.com>
+Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
++++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+@@ -24,6 +24,7 @@
+ #include <linux/completion.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/of_graph.h>
++#include <linux/math64.h>
+
+ #include "tilcdc_drv.h"
+ #include "tilcdc_regs.h"
+@@ -48,6 +49,7 @@ struct tilcdc_crtc {
+ unsigned int lcd_fck_rate;
+
+ ktime_t last_vblank;
++ unsigned int hvtotal_us;
+
+ struct drm_framebuffer *curr_fb;
+ struct drm_framebuffer *next_fb;
+@@ -292,6 +294,12 @@ static void tilcdc_crtc_set_clk(struct d
+ LCDC_V2_CORE_CLK_EN);
+ }
+
++uint tilcdc_mode_hvtotal(const struct drm_display_mode *mode)
++{
++ return (uint) div_u64(1000llu * mode->htotal * mode->vtotal,
++ mode->clock);
++}
++
+ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc)
+ {
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+@@ -459,6 +467,9 @@ static void tilcdc_crtc_set_mode(struct
+ drm_framebuffer_reference(fb);
+
+ crtc->hwmode = crtc->state->adjusted_mode;
++
++ tilcdc_crtc->hvtotal_us =
++ tilcdc_mode_hvtotal(&crtc->hwmode);
+ }
+
+ static void tilcdc_crtc_enable(struct drm_crtc *crtc)
+@@ -648,7 +659,7 @@ int tilcdc_crtc_update_fb(struct drm_crt
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ next_vblank = ktime_add_us(tilcdc_crtc->last_vblank,
+- 1000000 / crtc->hwmode.vrefresh);
++ tilcdc_crtc->hvtotal_us);
+ tdiff = ktime_to_us(ktime_sub(next_vblank, ktime_get()));
+
+ if (tdiff < TILCDC_VBLANK_SAFETY_THRESHOLD_US)
--- /dev/null
+From e1fc12c5d9ad06a2a74e97a91f1b0c5f4c723b50 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com>
+Date: Fri, 3 Nov 2017 16:00:35 +0100
+Subject: drm/ttm: Always and only destroy bo->ttm_resv in ttm_bo_release_list
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Michel Dänzer <michel.daenzer@amd.com>
+
+commit e1fc12c5d9ad06a2a74e97a91f1b0c5f4c723b50 upstream.
+
+Fixes a use-after-free due to a race condition in
+ttm_bo_cleanup_refs_and_unlock, which allows one task to reserve a BO
+and destroy its ttm_resv while another task is waiting for it to signal
+in reservation_object_wait_timeout_rcu.
+
+v2:
+* Always initialize bo->ttm_resv in ttm_bo_init_reserved
+ (Christian König)
+
+Fixes: 0d2bd2ae045d "drm/ttm: fix memory leak while individualizing BOs"
+Reviewed-by: Chunming Zhou <david1.zhou@amd.com> # v1
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Lyude Paul <lyude@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/ttm/ttm_bo.c | 11 ++++-------
+ 1 file changed, 4 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/ttm/ttm_bo.c
++++ b/drivers/gpu/drm/ttm/ttm_bo.c
+@@ -150,8 +150,7 @@ static void ttm_bo_release_list(struct k
+ ttm_tt_destroy(bo->ttm);
+ atomic_dec(&bo->glob->bo_count);
+ dma_fence_put(bo->moving);
+- if (bo->resv == &bo->ttm_resv)
+- reservation_object_fini(&bo->ttm_resv);
++ reservation_object_fini(&bo->ttm_resv);
+ mutex_destroy(&bo->wu_mutex);
+ if (bo->destroy)
+ bo->destroy(bo);
+@@ -402,14 +401,11 @@ static int ttm_bo_individualize_resv(str
+ if (bo->resv == &bo->ttm_resv)
+ return 0;
+
+- reservation_object_init(&bo->ttm_resv);
+ BUG_ON(!reservation_object_trylock(&bo->ttm_resv));
+
+ r = reservation_object_copy_fences(&bo->ttm_resv, bo->resv);
+- if (r) {
++ if (r)
+ reservation_object_unlock(&bo->ttm_resv);
+- reservation_object_fini(&bo->ttm_resv);
+- }
+
+ return r;
+ }
+@@ -459,6 +455,7 @@ static void ttm_bo_cleanup_refs_or_queue
+ spin_unlock(&glob->lru_lock);
+ if (bo->resv != &bo->ttm_resv)
+ reservation_object_unlock(&bo->ttm_resv);
++
+ ttm_bo_cleanup_memtype_use(bo);
+ return;
+ }
+@@ -1205,8 +1202,8 @@ int ttm_bo_init_reserved(struct ttm_bo_d
+ lockdep_assert_held(&bo->resv->lock.base);
+ } else {
+ bo->resv = &bo->ttm_resv;
+- reservation_object_init(&bo->ttm_resv);
+ }
++ reservation_object_init(&bo->ttm_resv);
+ atomic_inc(&bo->glob->bo_count);
+ drm_vma_node_reset(&bo->vma_node);
+ bo->priority = 0;
--- /dev/null
+From 4d98e5ee6084f6d7bc578c5d5f86de7156aaa4cb Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Mon, 30 Oct 2017 14:57:43 +0100
+Subject: drm/ttm: once more fix ttm_buffer_object_transfer
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 4d98e5ee6084f6d7bc578c5d5f86de7156aaa4cb upstream.
+
+When the mutex is locked just in the moment we copy it we end up with a
+warning that we release a locked mutex.
+
+Fix this by properly reinitializing the mutex.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/ttm/ttm_bo_util.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
++++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
+@@ -474,6 +474,7 @@ static int ttm_buffer_object_transfer(st
+ INIT_LIST_HEAD(&fbo->lru);
+ INIT_LIST_HEAD(&fbo->swap);
+ INIT_LIST_HEAD(&fbo->io_reserve_lru);
++ mutex_init(&fbo->wu_mutex);
+ fbo->moving = NULL;
+ drm_vma_node_reset(&fbo->vma_node);
+ atomic_set(&fbo->cpu_writers, 0);
--- /dev/null
+From 632c6e4edef17c40bba3be67c980d959790d142f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Tue, 10 Oct 2017 16:33:22 +0300
+Subject: drm/vblank: Fix flip event vblank count
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit 632c6e4edef17c40bba3be67c980d959790d142f upstream.
+
+On machines where the vblank interrupt fires some time after the start
+of vblank (or we just manage to race with the vblank interrupt handler)
+we will currently stuff a stale vblank counter value into the flip event,
+and thus we'll prematurely complete the flip.
+
+Switch over to drm_crtc_accurate_vblank_count() to make sure we have an
+up to date counter value, crucially also remember to add the +1 so that
+the delayed vblank interrupt won't complete the flip prematurely.
+
+Cc: Daniel Vetter <daniel@ffwll.ch>
+Suggested-by: Daniel Vetter <daniel@ffwll.ch>
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171010133322.24029-1-ville.syrjala@linux.intel.com
+Reviewed-by: Daniel Vetter <daniel@ffwll.ch> #irc
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_vblank.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/drm_vblank.c
++++ b/drivers/gpu/drm/drm_vblank.c
+@@ -869,7 +869,7 @@ void drm_crtc_arm_vblank_event(struct dr
+ assert_spin_locked(&dev->event_lock);
+
+ e->pipe = pipe;
+- e->event.sequence = drm_vblank_count(dev, pipe);
++ e->event.sequence = drm_crtc_accurate_vblank_count(crtc) + 1;
+ e->event.crtc_id = crtc->base.id;
+ list_add_tail(&e->base.link, &dev->vblank_event_list);
+ }
--- /dev/null
+From a111fbc4c44d2981f1a8fef64418685be5e30280 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Mon, 23 Oct 2017 18:25:40 +0300
+Subject: drm/vblank: Tune drm_crtc_accurate_vblank_count() WARN down to a debug
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit a111fbc4c44d2981f1a8fef64418685be5e30280 upstream.
+
+Since commit 632c6e4edef1 ("drm/vblank: Fix flip event vblank count")
+even drivers that don't implement accurate vblank timestamps will end
+up using drm_crtc_accurate_vblank_count(). That leads to a WARN every
+time drm_crtc_arm_vblank_event() gets called. The could be as often
+as every frame for each active crtc.
+
+Considering drm_crtc_accurate_vblank_count() is never any worse than
+the drm_vblank_count() we used previously, let's just skip the WARN
+unless DRM_UT_VBL is enabled. That way people won't be bothered by
+this unless they're debugging vblank code. And let's also change it
+to WARN_ONCE() so that even when you're debugging vblank code you
+won't get drowned by constant WARNs.
+
+Cc: Daniel Vetter <daniel@ffwll.ch>
+Cc: "Szyprowski, Marek" <m.szyprowski@samsung.com>
+Cc: Andrzej Hajda <a.hajda@samsung.com>
+Reported-by: Andrzej Hajda <a.hajda@samsung.com>
+Fixes: 632c6e4edef1 ("drm/vblank: Fix flip event vblank count")
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171023152540.15364-1-ville.syrjala@linux.intel.com
+Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_vblank.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/drm_vblank.c
++++ b/drivers/gpu/drm/drm_vblank.c
+@@ -311,8 +311,8 @@ u32 drm_crtc_accurate_vblank_count(struc
+ u32 vblank;
+ unsigned long flags;
+
+- WARN(!dev->driver->get_vblank_timestamp,
+- "This function requires support for accurate vblank timestamps.");
++ WARN_ONCE(drm_debug & DRM_UT_VBL && !dev->driver->get_vblank_timestamp,
++ "This function requires support for accurate vblank timestamps.");
+
+ spin_lock_irqsave(&dev->vblank_time_lock, flags);
+
drm-amdgpu-remove-check-which-is-not-valid-for-certain-vbios.patch
drm-ttm-fix-ttm_bo_cleanup_refs_or_queue-once-more.patch
dma-buf-make-reservation_object_copy_fences-rcu-save.patch
+drm-amdgpu-reserve-root-pd-while-releasing-it.patch
+drm-ttm-always-and-only-destroy-bo-ttm_resv-in-ttm_bo_release_list.patch
+drm-vblank-fix-flip-event-vblank-count.patch
+drm-vblank-tune-drm_crtc_accurate_vblank_count-warn-down-to-a-debug.patch
+drm-tilcdc-precalculate-total-frametime-in-tilcdc_crtc_set_mode.patch
+drm-radeon-fix-atombios-on-big-endian.patch
+drm-panel-simple-add-missing-panel_simple_unprepare-calls.patch
+drm-hisilicon-ensure-ldi-regs-are-properly-configured.patch
+drm-ttm-once-more-fix-ttm_buffer_object_transfer.patch
+drm-amd-pp-fix-typecast-error-in-powerplay.patch
+drm-fb_helper-disable-all-crtc-s-when-initial-setup-fails.patch
+drm-fsl-dcu-don-t-set-connector-dpms-property.patch
+drm-edid-don-t-send-non-zero-yq-in-avi-infoframe-for-hdmi-1.x-sinks.patch
+drm-amdgpu-move-uvd-vce-and-vcn-structure-out-from-union.patch
+drm-amdgpu-set-adev-vcn.irq.num_types-for-vcn.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
