]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
mtd: spinand: winbond: Declare the QE bit on W25NxxJW
authorMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 25 Mar 2026 17:04:50 +0000 (18:04 +0100)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Fri, 10 Apr 2026 17:10:44 +0000 (19:10 +0200)
Factory default for this bit is "set" (at least on the chips I have),
but we must make sure it is actually set by Linux explicitly, as the
bit is writable by an earlier stage.

Fixes: 6a804fb72de5 ("mtd: spinand: winbond: add support for serial NAND flash")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/mtd/nand/spi/winbond.c

index e0138785e28080f74944680d8f9d09d23a775da4..ad22774096e612b246bbe83b24a49865ce5f6ed8 100644 (file)
@@ -488,7 +488,7 @@ static const struct spinand_info winbond_spinand_table[] = {
                     SPINAND_INFO_OP_VARIANTS(&read_cache_dual_quad_dtr_variants,
                                              &write_cache_variants,
                                              &update_cache_variants),
-                    0,
+                    SPINAND_HAS_QE_BIT,
                     SPINAND_ECCINFO(&w25n01jw_ooblayout, NULL),
                     SPINAND_CONFIGURE_CHIP(w25n0xjw_hs_cfg)),
        SPINAND_INFO("W25N01KV", /* 3.3V */
@@ -552,7 +552,7 @@ static const struct spinand_info winbond_spinand_table[] = {
                     SPINAND_INFO_OP_VARIANTS(&read_cache_dual_quad_dtr_variants,
                                              &write_cache_variants,
                                              &update_cache_variants),
-                    0,
+                    SPINAND_HAS_QE_BIT,
                     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
                     SPINAND_CONFIGURE_CHIP(w25n0xjw_hs_cfg)),
        SPINAND_INFO("W25N02KV", /* 3.3V */