RISC-V: Add ZC* test for failed march args being passed.

Add ZC* extensions march args tests for error input cases.

Co-Authored by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Co-Authored by: Jiawei <jiawei@iscas.ac.cn>
Co-Authored by: Mary Bennett <mary.bennett@embecosm.com>
Co-Authored by: Simon Cook <simon.cook@embecosm.com>

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-24.c: New test.
	* gcc.target/riscv/arch-25.c: New test.

diff --git a/gcc/testsuite/gcc.target/riscv/arch-24.c b/gcc/testsuite/gcc.target/riscv/arch-24.c
new file mode 100644 (file)
index 0000000..3be4ade
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-24.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zcf -mabi=lp64" } */
+int foo() {}
+/* { dg-error "'-march=rv64i_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64i_zca_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */

diff --git a/gcc/testsuite/gcc.target/riscv/arch-25.c b/gcc/testsuite/gcc.target/riscv/arch-25.c
new file mode 100644 (file)
index 0000000..3be4ade
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-25.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zcf -mabi=lp64" } */
+int foo() {}
+/* { dg-error "'-march=rv64i_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64i_zca_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */