i386: Fix up predicates on <ssse3_avx2>_pmulhrsw<mode>3, smulhrs<mode>3 expanders...

The following testcase ICEs since r6-6060-gacf93f1edc9 aka PR68991 fix.
THe problem is that the commit has changed the predicates on
*<ssse3_avx2>_pmulhrsw<mode>3<mask_name> pattern from nonimmediate_operand
to vector_operand but kept the old predicates on the corresponding
expanders.  With TARGET_AVX that makes no difference (so I've left
the <ssse3_avx2>_pmulhrsw<mode>3_mask expander as is, that is only
TARGET_AVX512BW && TARGET_AVX512VL), but without it if there is unaligned
memory the expander can just expand it as memory without forcing into REG
while the pattern will not match.

2026-06-06  Jakub Jelinek  <jakub@redhat.com>

	PR target/125611
	* config/i386/sse.md (<ssse3_avx2>_pmulhrsw<mode>3, smulhrs<mode>3):
	Use vector_operand instead of nonimmediate_operand.

	* gcc.target/i386/ssse3-pr125611.c: New test.

Reviewed-by: Uros Bizjak <ubizjak@gmail.com>

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a632e256e9153ca27171d0bcd3ac393c751f0939..6ca3e34b2c7dcf9c40a78ae2ed70aa0f4b401fb0 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -23463,9 +23463,9 @@
              (lshiftrt:<ssedoublemode>
                (mult:<ssedoublemode>
                  (sign_extend:<ssedoublemode>
-                   (match_operand:PMULHRSW 1 "nonimmediate_operand"))
+                   (match_operand:PMULHRSW 1 "vector_operand"))
                  (sign_extend:<ssedoublemode>
-                   (match_operand:PMULHRSW 2 "nonimmediate_operand")))
+                   (match_operand:PMULHRSW 2 "vector_operand")))
                (const_int 14))
              (match_dup 3))
            (const_int 1))))]
@@ -23483,9 +23483,9 @@
              (lshiftrt:<ssedoublemode>
                (mult:<ssedoublemode>
                  (sign_extend:<ssedoublemode>
-                   (match_operand:VI2_AVX2_AVX512BW 1 "nonimmediate_operand"))
+                   (match_operand:VI2_AVX2_AVX512BW 1 "vector_operand"))
                  (sign_extend:<ssedoublemode>
-                   (match_operand:VI2_AVX2_AVX512BW 2 "nonimmediate_operand")))
+                   (match_operand:VI2_AVX2_AVX512BW 2 "vector_operand")))
                (const_int 14))
              (match_dup 3))
            (const_int 1))))]

diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pr125611.c b/gcc/testsuite/gcc.target/i386/ssse3-pr125611.c
new file mode 100644 (file)
index 0000000..7205edc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssse3-pr125611.c
@@ -0,0 +1,12 @@
+/* PR target/125611 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mssse3 -mno-sse4.1" } */
+
+typedef __attribute__((__vector_size__(16))) short V;
+struct __attribute__((__packed__)) { V v[4]; } *u;
+
+void
+foo (void)
+{
+  u->v[2] &= __builtin_ia32_pmulhrsw128 (u->v[0], u->v[1]);
+}