drm/i915/dsb: add intel_dsb_gosub_finish()

A DSB buffer which will be used for GOSUB execution does not need
the DEWAKE mechanism but still need to be 64 bit aligned. Add helper
to finish preparation of a dsb buffer to be executed with GOSUB
instruction.

v2: Add a cacheline of noops at the end of GOSUB buffer (Ville)

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-6-chaitanya.kumar.borah@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index cd32b59adf18751ad0627c2f3472f5583084aa90..04c2096df2dc88bbc609c791a8b9ae0a1bc43c2d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -606,6 +606,19 @@ void intel_dsb_gosub(struct intel_dsb *dsb,
        intel_dsb_align_tail(dsb);
 }
 
+void intel_dsb_gosub_finish(struct intel_dsb *dsb)
+{
+       intel_dsb_align_tail(dsb);
+
+       /*
+        * "All subroutines called by the GOSUB instruction
+        *  must end with a cacheline of NOPs"
+        */
+       intel_dsb_noop(dsb, 8);
+
+       intel_dsb_buffer_flush_map(&dsb->dsb_buf);
+}
+
 void intel_dsb_finish(struct intel_dsb *dsb)
 {
        struct intel_crtc *crtc = dsb->crtc;

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
index 8b2cf0a7b7e68068436d00300c80e74eb7e5cee3..6900acd603b8660e99205755e19261f334336526 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dsb.h
+++ b/drivers/gpu/drm/i915/display/intel_dsb.h
@@ -31,6 +31,7 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state,
                                    enum intel_dsb_id dsb_id,
                                    unsigned int max_cmds);
 void intel_dsb_finish(struct intel_dsb *dsb);
+void intel_dsb_gosub_finish(struct intel_dsb *dsb);
 void intel_dsb_cleanup(struct intel_dsb *dsb);
 void intel_dsb_reg_write(struct intel_dsb *dsb,
                         i915_reg_t reg, u32 val);