Fix constraint in vec_unpack_trunc_<mode>

2014-07-04  Tom de Vries  <tom@codesourcery.com>

	* config/aarch64/aarch64-simd.md
	(define_insn "vec_unpack_trunc_<mode>"): Fix constraint.

From-SVN: r212296

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 632b8364a8ea2af7ed53a8a1332746c5a39ef855..a9f535079b361cecb8a2caba8f16fbce9dafa3d7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-07-04  Tom de Vries  <tom@codesourcery.com>
+
+       * config/aarch64/aarch64-simd.md
+       (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
+
 2014-07-04  Richard Earnshaw  <rearnsha@arm.com>
 
        PR target/61714

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index f03d6470e957cc3c0bb656b9a5cfe373dda4cf18..0d05c78a71a42e5e54fa4eb2874b763782ea9586 100644 (file)
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1018,7 +1018,7 @@
 ;; For quads.
 
 (define_insn "vec_pack_trunc_<mode>"
- [(set (match_operand:<VNARROWQ2> 0 "register_operand" "+&w")
+ [(set (match_operand:<VNARROWQ2> 0 "register_operand" "=&w")
        (vec_concat:<VNARROWQ2>
         (truncate:<VNARROWQ> (match_operand:VQN 1 "register_operand" "w"))
         (truncate:<VNARROWQ> (match_operand:VQN 2 "register_operand" "w"))))]