]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
mtd: spinand: toshiba: Support for new Kioxia Serial NAND
authorYoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Tue, 24 Mar 2020 06:49:55 +0000 (15:49 +0900)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Tue, 24 Mar 2020 21:51:22 +0000 (22:51 +0100)
Add support for new Kioxia products.
The new Kioxia products support program load x4 command, and have
HOLD_D bit which is equivalent to QE bit.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
drivers/mtd/nand/spi/toshiba.c

index 5d217dd4b2539af23c4a92299f6313cf4fbd4c6d..bc801d83343e5cf9d5e728d676d3bda2349325d0 100644 (file)
@@ -20,6 +20,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
                SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
                SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
 
+static SPINAND_OP_VARIANTS(write_cache_x4_variants,
+               SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+               SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_x4_variants,
+               SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+               SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+/**
+ * Backward compatibility for 1st generation Serial NAND devices
+ * which don't support Quad Program Load operation.
+ */
 static SPINAND_OP_VARIANTS(write_cache_variants,
                SPINAND_PROG_LOAD(true, 0, NULL, 0));
 
@@ -95,7 +107,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info toshiba_spinand_table[] = {
-       /* 3.3V 1Gb */
+       /* 3.3V 1Gb (1st generation) */
        SPINAND_INFO("TC58CVG0S3HRAIG",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
                     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
@@ -106,7 +118,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
                     0,
                     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
                                     tx58cxgxsxraix_ecc_get_status)),
-       /* 3.3V 2Gb */
+       /* 3.3V 2Gb (1st generation) */
        SPINAND_INFO("TC58CVG1S3HRAIG",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
                     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
@@ -117,7 +129,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
                     0,
                     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
                                     tx58cxgxsxraix_ecc_get_status)),
-       /* 3.3V 4Gb */
+       /* 3.3V 4Gb (1st generation) */
        SPINAND_INFO("TC58CVG2S0HRAIG",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
                     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
@@ -128,18 +140,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
                     0,
                     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
                                     tx58cxgxsxraix_ecc_get_status)),
-       /* 3.3V 4Gb */
-       SPINAND_INFO("TC58CVG2S0HRAIJ",
-                       SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
-                    NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
-                    NAND_ECCREQ(8, 512),
-                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-                                             &write_cache_variants,
-                                             &update_cache_variants),
-                    0,
-                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
-                                    tx58cxgxsxraix_ecc_get_status)),
-       /* 1.8V 1Gb */
+       /* 1.8V 1Gb (1st generation) */
        SPINAND_INFO("TC58CYG0S3HRAIG",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
                     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
@@ -150,7 +151,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
                     0,
                     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
                                     tx58cxgxsxraix_ecc_get_status)),
-       /* 1.8V 2Gb */
+       /* 1.8V 2Gb (1st generation) */
        SPINAND_INFO("TC58CYG1S3HRAIG",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
                     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
@@ -161,7 +162,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
                     0,
                     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
                                     tx58cxgxsxraix_ecc_get_status)),
-       /* 1.8V 4Gb */
+       /* 1.8V 4Gb (1st generation) */
        SPINAND_INFO("TC58CYG2S0HRAIG",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
                     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
@@ -172,6 +173,99 @@ static const struct spinand_info toshiba_spinand_table[] = {
                     0,
                     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
                                     tx58cxgxsxraix_ecc_get_status)),
+
+       /*
+        * 2nd generation serial nand has HOLD_D which is equivalent to
+        * QE_BIT.
+        */
+       /* 3.3V 1Gb (2nd generation) */
+       SPINAND_INFO("TC58CVG0S3HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
+                    NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 3.3V 2Gb (2nd generation) */
+       SPINAND_INFO("TC58CVG1S3HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
+                    NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 3.3V 4Gb (2nd generation) */
+       SPINAND_INFO("TC58CVG2S0HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
+                    NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 3.3V 8Gb (2nd generation) */
+       SPINAND_INFO("TH58CVG3S0HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
+                    NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 1.8V 1Gb (2nd generation) */
+       SPINAND_INFO("TC58CYG0S3HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
+                    NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 1.8V 2Gb (2nd generation) */
+       SPINAND_INFO("TC58CYG1S3HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
+                    NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 1.8V 4Gb (2nd generation) */
+       SPINAND_INFO("TC58CYG2S0HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
+                    NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
+       /* 1.8V 8Gb (2nd generation) */
+       SPINAND_INFO("TH58CYG3S0HRAIJ",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
+                    NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
+                    NAND_ECCREQ(8, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_x4_variants,
+                                             &update_cache_x4_variants),
+                    SPINAND_HAS_QE_BIT,
+                    SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+                                    tx58cxgxsxraix_ecc_get_status)),
 };
 
 static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {