clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574

Add support for NSS Huayra alpha pll found on ipq9574 SoCs.
Programming sequence is the same as that of Huayra type Alpha PLL,
so we can re-use the same.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20241028060506.246606-2-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index bd1dbef04d9de3926ededbf975ddbb380c7e52a8..bba56f39328ea75566a8c04e550c9555b0705f76 100644 (file)
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -267,6 +267,17 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
                [PLL_OFF_OPMODE] = 0x30,
                [PLL_OFF_STATUS] = 0x3c,
        },
+       [CLK_ALPHA_PLL_TYPE_NSS_HUAYRA] =  {
+               [PLL_OFF_L_VAL] = 0x04,
+               [PLL_OFF_ALPHA_VAL] = 0x08,
+               [PLL_OFF_TEST_CTL] = 0x0c,
+               [PLL_OFF_TEST_CTL_U] = 0x10,
+               [PLL_OFF_USER_CTL] = 0x14,
+               [PLL_OFF_CONFIG_CTL] = 0x18,
+               [PLL_OFF_CONFIG_CTL_U] = 0x1c,
+               [PLL_OFF_STATUS] = 0x20,
+       },
+
 };
 EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
 

diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 55eca04b23a1fc3f3554f43a8fdd329a524dad0e..c6d1b8429f951a27fa18cd5b82f067acdf826454 100644 (file)
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -32,6 +32,7 @@ enum {
        CLK_ALPHA_PLL_TYPE_BRAMMO_EVO,
        CLK_ALPHA_PLL_TYPE_STROMER,
        CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
+       CLK_ALPHA_PLL_TYPE_NSS_HUAYRA,
        CLK_ALPHA_PLL_TYPE_MAX,
 };