clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration

Convert the divider clock registration in the R9A09G077 CPG driver to use
device-managed (devm_) helper functions.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r9a09g077-cpg.c b/drivers/clk/renesas/r9a09g077-cpg.c
index 666fc16b9a81f2496eebc998ede818c30728b9e2..b46167d42084d3e854cb2ca7466c018499f4ab97 100644 (file)
--- a/drivers/clk/renesas/r9a09g077-cpg.c
+++ b/drivers/clk/renesas/r9a09g077-cpg.c
@@ -220,21 +220,23 @@ r9a09g077_cpg_div_clk_register(struct device *dev,
        parent_name = __clk_get_name(parent);
 
        if (core->dtable)
-               clk_hw = clk_hw_register_divider_table(dev, core->name,
-                                                      parent_name, CLK_SET_RATE_PARENT,
-                                                      addr,
-                                                      GET_SHIFT(core->conf),
-                                                      GET_WIDTH(core->conf),
-                                                      core->flag,
-                                                      core->dtable,
-                                                      &pub->rmw_lock);
+               clk_hw = devm_clk_hw_register_divider_table(dev, core->name,
+                                                           parent_name,
+                                                           CLK_SET_RATE_PARENT,
+                                                           addr,
+                                                           GET_SHIFT(core->conf),
+                                                           GET_WIDTH(core->conf),
+                                                           core->flag,
+                                                           core->dtable,
+                                                           &pub->rmw_lock);
        else
-               clk_hw = clk_hw_register_divider(dev, core->name,
-                                                parent_name, CLK_SET_RATE_PARENT,
-                                                addr,
-                                                GET_SHIFT(core->conf),
-                                                GET_WIDTH(core->conf),
-                                                core->flag, &pub->rmw_lock);
+               clk_hw = devm_clk_hw_register_divider(dev, core->name,
+                                                     parent_name,
+                                                     CLK_SET_RATE_PARENT,
+                                                     addr,
+                                                     GET_SHIFT(core->conf),
+                                                     GET_WIDTH(core->conf),
+                                                     core->flag, &pub->rmw_lock);
 
        if (IS_ERR(clk_hw))
                return ERR_CAST(clk_hw);