]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
testsuite: Change expectation for bb-slp-over-widen-n.c
authorRobin Dapp <rdapp@ventanamicro.com>
Tue, 7 Nov 2023 07:58:07 +0000 (08:58 +0100)
committerRobin Dapp <rdapp@ventanamicro.com>
Tue, 7 Nov 2023 12:19:59 +0000 (13:19 +0100)
This patch makes sure we check for
  note: Basic block will be vectorized using SLP
instead of
  optimized: basic block
which will also match
  optimized: basic block part
of which there are many more in an RVV dump.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/bb-slp-over-widen-1.c: Change test expectation.
* gcc.dg/vect/bb-slp-over-widen-2.c: Ditto.

gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-1.c
gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-2.c

index b556a1d627865f5425e644df11f98661e6a85c29..7646c4f5a8bb768a5e7c2d9c9045975062d90c64 100644 (file)
@@ -65,4 +65,4 @@ main (void)
 /* { dg-final { scan-tree-dump "demoting int to signed short" "slp2" { target { ! vect_widen_shift } } } } */
 /* { dg-final { scan-tree-dump "demoting int to unsigned short" "slp2" { target { ! vect_widen_shift } } } } */
 /* { dg-final { scan-tree-dump {\.AVG_FLOOR} "slp2" { target vect_avg_qi } } } */
-/* { dg-final { scan-tree-dump-times "optimized: basic block" 2 "slp2" { target vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "note: Basic block will be vectorized" 2 "slp2" { target vect_hw_misalign } } } */
index d1aa161c3adcfad1d916de486a04c075f0aaf958..d9838c0917d5917db43d03ad119cfc7c9c251e76 100644 (file)
@@ -64,4 +64,4 @@ main (void)
 /* { dg-final { scan-tree-dump "demoting int to signed short" "slp2" { target { ! vect_widen_shift } } } } */
 /* { dg-final { scan-tree-dump "demoting int to unsigned short" "slp2" { target { ! vect_widen_shift } } } } */
 /* { dg-final { scan-tree-dump {\.AVG_FLOOR} "slp2" { target vect_avg_qi } } } */
-/* { dg-final { scan-tree-dump-times "optimized: basic block" 2 "slp2" { target vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "note: Basic block will be vectorized" 2 "slp2" { target vect_hw_misalign } } } */