Merge tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel...

First batch of ASPEED Arm devicetree changes for 6.19

Significant changes:

- The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems

New platforms:

- IBM Balcones

  The Balcones system is similar to Bonnell but with a POWER11 processor.
  Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI
  tree is needed.

- Meta Yosemite5

  The Yosemite5 platform provides monitoring of voltages, power,
  temperatures, and other critical parameters across the motherboard,
  CXL board, E1.S expansion board, and NIC components.

Updated platforms:

- clemente (Meta): LEDs, shunt resistor configuration
- santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs

There are a scattering of one-off changes and devicetree cleanups for other
platforms as well.

* tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
  ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module
  ARM: dts: aspeed: santabarbara: Add AMD APML interface support
  ARM: dts: aspeed: santabarbara: Add gpio line name
  ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led
  ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC
  ARM: dts: aspeed: santabarbara: Add sensor support for extension boards
  ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability
  ARM: dts: aspeed: yosemite5: Add Meta Yosemite5 BMC
  dt-bindings: arm: aspeed: add Meta Yosemite5 board
  ARM: dts: aspeed: clemente: Add HDD LED GPIO
  ARM: dts: aspeed: Fix max31785 fan properties
  ARM: dts: aspeed: Add Balcones system
  dt-bindings: arm: aspeed: add IBM Bonnell board
  dt-bindings: arm: aspeed: add IBM Balcones board
  ARM: dts: aspeed: harma: Add MCTP I2C controller node
  ARM: dts: aspeed: yosemite4: allocate ramoops for kernel panic
  ARM: dts: aspeed: clemente: add shunt-resistor-micro-ohms for LM5066i

Signed-off-by: Arnd Bergmann <arnd@arndb.de>