drm/i915/guc: Enable Wa_14019159160

Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240223205632.1621019-4-John.C.Harrison@Intel.com

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index bb8e4c151a026ac079700879199da22fdaaa135c..8cf58b29410bc6faaa8db975266a44a7a6347306 100644 (file)
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -744,6 +744,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 #define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
 static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
 {
@@ -753,6 +754,7 @@ static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
 {
        int i;
@@ -793,6 +795,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
 
        /* Wa_14014475959:dg2 */
        /* Wa_16019325821 */
+       /* Wa_14019159160 */
        if (intel_engine_uses_wa_hold_switchout(rq->engine))
                cs = hold_switchout_emit_wa_busywait(rq, cs);
 

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index b519812ba120d85162223a8d157888ce72d2b12a..ba55c059063dbb792acecce94270c4db6f4cf954 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -697,6 +697,7 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 static inline bool
 intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
 {

diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
index 58012edd4eb0ecae87d4247880edad01b5e2db93..bebf28e3c4794b45fe520e5d57e4c0099c931af5 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
@@ -101,4 +101,11 @@ enum {
        GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,
 };
 
+/*
+ * Workaround keys:
+ */
+enum {
+       GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE                           = 0x9001,
+};
+
 #endif /* _ABI_GUC_KLVS_ABI_H */

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 6b1abefa7909fca81a0a3db02a51188f7eb86ac0..0c67d674c94de35a41ff40cce75937987b614c01 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -295,6 +295,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
                flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
 
        /* Wa_16019325821 */
+       /* Wa_14019159160 */
        if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
                flags |= GUC_WA_RCS_CCS_SWITCHOUT;
 

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index e0312f7702bb6f57a1b20aac6ab7bb0fe39fe7e8..5c9908b56616e8ffb3ffe941091cdd360a57728f 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -815,6 +815,25 @@ engine_instance_list:
        return PAGE_ALIGN(total_size);
 }
 
+/* Wa_14019159160 */
+static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)
+{
+       u32 size;
+       u32 klv_entry[] = {
+               /* 16:16 key/length */
+               FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |
+               FIELD_PREP(GUC_KLV_0_LEN, 0),
+               /* 0 dwords data */
+       };
+
+       size = sizeof(klv_entry);
+       GEM_BUG_ON(remain < size);
+
+       iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size);
+
+       return size;
+}
+
 static void guc_waklv_init(struct intel_guc *guc)
 {
        struct intel_gt *gt = guc_to_gt(guc);
@@ -830,15 +849,12 @@ static void guc_waklv_init(struct intel_guc *guc)
        offset = guc_ads_waklv_offset(guc);
        remain = guc_ads_waklv_size(guc);
 
-       /*
-        * Add workarounds here:
-        *
-        * if (want_wa_<name>) {
-        *      size = guc_waklv_<name>(guc, offset, remain);
-        *      offset += size;
-        *      remain -= size;
-        * }
-        */
+       /* Wa_14019159160 */
+       if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {
+               size = guc_waklv_ra_mode(guc, offset, remain);
+               offset += size;
+               remain -= size;
+       }
 
        size = guc_ads_waklv_size(guc) - remain;
        if (!size)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index f0fe6f967651763de51873d256c8d9123e79cdb4..01d0ec1b30f2baffebaab8a16ef731cd3b3dfc7d 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4505,6 +4505,7 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)
                        engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
 
        /* Wa_16019325821 */
+       /* Wa_14019159160 */
        if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) &&
            IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71)))
                engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;