3.0-stable patches

added patches:
	x86-microcode_amd-add-support-for-cpu-family-specific-container-files.patch
	x86-uv-fix-uv_gpa_to_soc_phys_ram-shift.patch

diff --git a/queue-3.0/series b/queue-3.0/series
index f82881fca61e5871b569797ddab438394fe1f8ae..65b047e2bc62831efe2d81f89dd8004e0e1b4def 100644 (file)
--- a/queue-3.0/series
+++ b/queue-3.0/series
@@ -14,3 +14,5 @@ ftrace-update-filter-when-tracing-enabled-in-set_ftrace_filter.patch
 ftrace-fix-unregister-ftrace_ops-accounting.patch
 ah-don-t-return-net_xmit_drop-on-input.patch
 xfs-fix-endian-conversion-issue-in-discard-code.patch
+x86-uv-fix-uv_gpa_to_soc_phys_ram-shift.patch
+x86-microcode_amd-add-support-for-cpu-family-specific-container-files.patch

diff --git a/queue-3.0/x86-microcode_amd-add-support-for-cpu-family-specific-container-files.patch b/queue-3.0/x86-microcode_amd-add-support-for-cpu-family-specific-container-files.patch
new file mode 100644 (file)
index 0000000..aa079a4
--- /dev/null
+++ b/queue-3.0/x86-microcode_amd-add-support-for-cpu-family-specific-container-files.patch
@@ -0,0 +1,72 @@
+From 5b68edc91cdc972c46f76f85eded7ffddc3ff5c2 Mon Sep 17 00:00:00 2001
+From: Andreas Herrmann <andreas.herrmann3@amd.com>
+Date: Fri, 20 Jan 2012 17:44:12 +0100
+Subject: x86/microcode_amd: Add support for CPU family specific container files
+
+From: Andreas Herrmann <andreas.herrmann3@amd.com>
+
+commit 5b68edc91cdc972c46f76f85eded7ffddc3ff5c2 upstream.
+
+We've decided to provide CPU family specific container files
+(starting with CPU family 15h). E.g. for family 15h we have to
+load microcode_amd_fam15h.bin instead of microcode_amd.bin
+
+Rationale is that starting with family 15h patch size is larger
+than 2KB which was hard coded as maximum patch size in various
+microcode loaders (not just Linux).
+
+Container files which include patches larger than 2KB cause
+different kinds of trouble with such old patch loaders. Thus we
+have to ensure that the default container file provides only
+patches with size less than 2KB.
+
+Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
+Cc: Borislav Petkov <borislav.petkov@amd.com>
+Cc: <stable@kernel.org>
+Link: http://lkml.kernel.org/r/20120120164412.GD24508@alberich.amd.com
+[ documented the naming convention and tidied the code a bit. ]
+Signed-off-by: Ingo Molnar <mingo@elte.hu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/x86/kernel/microcode_amd.c |   24 ++++++++++++++++++++++--
+ 1 file changed, 22 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/kernel/microcode_amd.c
++++ b/arch/x86/kernel/microcode_amd.c
+@@ -298,13 +298,33 @@ free_table:
+       return state;
+ }
+ 
++/*
++ * AMD microcode firmware naming convention, up to family 15h they are in
++ * the legacy file:
++ *
++ *    amd-ucode/microcode_amd.bin
++ *
++ * This legacy file is always smaller than 2K in size.
++ *
++ * Starting at family 15h they are in family specific firmware files:
++ *
++ *    amd-ucode/microcode_amd_fam15h.bin
++ *    amd-ucode/microcode_amd_fam16h.bin
++ *    ...
++ *
++ * These might be larger than 2K.
++ */
+ static enum ucode_state request_microcode_amd(int cpu, struct device *device)
+ {
+-      const char *fw_name = "amd-ucode/microcode_amd.bin";
++      char fw_name[36] = "amd-ucode/microcode_amd.bin";
+       const struct firmware *fw;
+       enum ucode_state ret = UCODE_NFOUND;
++      struct cpuinfo_x86 *c = &cpu_data(cpu);
+ 
+-      if (request_firmware(&fw, fw_name, device)) {
++      if (c->x86 >= 0x15)
++              snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
++
++      if (request_firmware(&fw, (const char *)fw_name, device)) {
+               pr_err("failed to load file %s\n", fw_name);
+               goto out;
+       }

diff --git a/queue-3.0/x86-uv-fix-uv_gpa_to_soc_phys_ram-shift.patch b/queue-3.0/x86-uv-fix-uv_gpa_to_soc_phys_ram-shift.patch
new file mode 100644 (file)
index 0000000..fc2e492
--- /dev/null
+++ b/queue-3.0/x86-uv-fix-uv_gpa_to_soc_phys_ram-shift.patch
@@ -0,0 +1,39 @@
+From 5a51467b146ab7948d2f6812892eac120a30529c Mon Sep 17 00:00:00 2001
+From: Russ Anderson <rja@sgi.com>
+Date: Wed, 18 Jan 2012 20:07:54 -0600
+Subject: x86/uv: Fix uv_gpa_to_soc_phys_ram() shift
+
+From: Russ Anderson <rja@sgi.com>
+
+commit 5a51467b146ab7948d2f6812892eac120a30529c upstream.
+
+uv_gpa_to_soc_phys_ram() was inadvertently ignoring the
+shift values.  This fix takes the shift into account.
+
+Signed-off-by: Russ Anderson <rja@sgi.com>
+Link: http://lkml.kernel.org/r/20120119020753.GA7228@sgi.com
+Signed-off-by: Ingo Molnar <mingo@elte.hu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/x86/include/asm/uv/uv_hub.h |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/include/asm/uv/uv_hub.h
++++ b/arch/x86/include/asm/uv/uv_hub.h
+@@ -318,13 +318,13 @@ uv_gpa_in_mmr_space(unsigned long gpa)
+ /* UV global physical address --> socket phys RAM */
+ static inline unsigned long uv_gpa_to_soc_phys_ram(unsigned long gpa)
+ {
+-      unsigned long paddr = gpa & uv_hub_info->gpa_mask;
++      unsigned long paddr;
+       unsigned long remap_base = uv_hub_info->lowmem_remap_base;
+       unsigned long remap_top =  uv_hub_info->lowmem_remap_top;
+ 
+       gpa = ((gpa << uv_hub_info->m_shift) >> uv_hub_info->m_shift) |
+               ((gpa >> uv_hub_info->n_lshift) << uv_hub_info->m_val);
+-      gpa = gpa & uv_hub_info->gpa_mask;
++      paddr = gpa & uv_hub_info->gpa_mask;
+       if (paddr >= remap_base && paddr < remap_base + remap_top)
+               paddr -= remap_base;
+       return paddr;