soundwire: SDCA: Add additional SDCA address macros

Compliment the existing macro to construct an SDCA control address
with macros to extract the constituent parts, and validation of such
an address. Also update the masks for the original macro to use
GENMASK to make mental comparisons with the included comment on the
address format easier.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20250107154408.814455-2-ckeepax@opensource.cirrus.com
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.dev>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/include/linux/soundwire/sdw_registers.h b/include/linux/soundwire/sdw_registers.h
index 658b10fa5b20adb2babbf9c5694696d5044fefe3..0a5939285583b60c5b806b1ec0e248c78f8e10ea 100644 (file)
--- a/include/linux/soundwire/sdw_registers.h
+++ b/include/linux/soundwire/sdw_registers.h
@@ -4,6 +4,9 @@
 #ifndef __SDW_REGISTERS_H
 #define __SDW_REGISTERS_H
 
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+
 /*
  * SDW registers as defined by MIPI 1.2 Spec
  */
@@ -329,16 +332,27 @@
  *     2:0             Control Number[2:0]
  */
 
-#define SDW_SDCA_CTL(fun, ent, ctl, ch)                (BIT(30) |                      \
-                                                (((fun) & 0x7) << 22) |        \
-                                                (((ent) & 0x40) << 15) |       \
-                                                (((ent) & 0x3f) << 7) |        \
-                                                (((ctl) & 0x30) << 15) |       \
-                                                (((ctl) & 0x0f) << 3) |        \
-                                                (((ch) & 0x38) << 12) |        \
-                                                ((ch) & 0x07))
+#define SDW_SDCA_CTL(fun, ent, ctl, ch)                (BIT(30) |                              \
+                                                (((fun) & GENMASK(2, 0)) << 22) |      \
+                                                (((ent) & BIT(6)) << 15) |             \
+                                                (((ent) & GENMASK(5, 0)) << 7) |       \
+                                                (((ctl) & GENMASK(5, 4)) << 15) |      \
+                                                (((ctl) & GENMASK(3, 0)) << 3) |       \
+                                                (((ch) & GENMASK(5, 3)) << 12) |       \
+                                                ((ch) & GENMASK(2, 0)))
+
+#define SDW_SDCA_CTL_FUNC(reg) FIELD_GET(GENMASK(24, 22), (reg))
+#define SDW_SDCA_CTL_ENT(reg) ((FIELD_GET(BIT(21), (reg)) << 6) | \
+                               FIELD_GET(GENMASK(12, 7), (reg)))
+#define SDW_SDCA_CTL_CSEL(reg) ((FIELD_GET(GENMASK(20, 19), (reg)) << 4) | \
+                                FIELD_GET(GENMASK(6, 3), (reg)))
+#define SDW_SDCA_CTL_CNUM(reg) ((FIELD_GET(GENMASK(17, 15), (reg)) << 3) | \
+                                FIELD_GET(GENMASK(2, 0), (reg)))
 
 #define SDW_SDCA_MBQ_CTL(reg)                  ((reg) | BIT(13))
 #define SDW_SDCA_NEXT_CTL(reg)                 ((reg) | BIT(14))
 
+/* Check the reserved and fixed bits in address */
+#define SDW_SDCA_VALID_CTL(reg) (((reg) & (GENMASK(31, 25) | BIT(18) | BIT(13))) == BIT(30))
+
 #endif /* __SDW_REGISTERS_H */