arm64: dts: imx8mp-beacon: Enable DW HDMI Bridge

There is a second HDMI connector on the baseboard which is routed
to the DW HDMI bridge through the PVI to the LCDIF3 and requires the
HDMI PHY to be enabled too.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
index 17e2c19d8455136a256bc927997cffc189ce05b7..0e2401bfc36af5b6639a418df4c8cebe66c16b7a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
@@ -105,6 +105,17 @@
                };
        };
 
+       hdmi-connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_connector: endpoint {
+                               remote-endpoint = <&hdmi_to_connector>;
+                       };
+               };
+       };
+
        leds {
                compatible = "gpio-leds";
                pinctrl-names = "default";
@@ -283,6 +294,26 @@
        };
 };
 
+&hdmi_tx {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hdmi>;
+       status = "okay";
+
+       ports {
+               port@1 {
+                       reg = <1>;
+
+                       hdmi_to_connector:endpoint {
+                               remote-endpoint = <&hdmi_connector>;
+                       };
+               };
+       };
+};
+
+&hdmi_tx_phy {
+       status = "okay";
+};
+
 &i2c2 {
        clock-frequency = <384000>;
        pinctrl-names = "default";
@@ -345,6 +376,10 @@
        };
 };
 
+&hdmi_pvi {
+       status = "okay";
+};
+
 &i2c3 {
        /* Connected to USB Hub */
        usb-typec@52 {
@@ -465,6 +500,10 @@
        status = "okay";
 };
 
+&lcdif3 {
+       status = "okay";
+};
+
 &micfil {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pdm>;
@@ -648,6 +687,15 @@
                >;
        };
 
+       pinctrl_hdmi: hdmigrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL     0x400001c2
+                       MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA     0x400001c2
+                       MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD         0x40000010
+                       MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC         0x40000010
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2