arm.c (arm_function_ok_for_sibcall): Only forbid sibling calls for Thumb-1.

	gcc/
	* config/arm/arm.c (arm_function_ok_for_sibcall): Only forbid
	sibling calls for Thumb-1.
	* config/arm/arm.h (USE_RETURN_INSN): Enable for Thumb-2.
	* config/arm/arm.md (*call_symbol, *call_value_symbol): Use for
	Thumb-2.
	(*call_insn, *call_value_insn): Don't use for Thumb-2.
	(sibcall, sibcall_value, *sibcall_insn, *sibcall_value_insn): Use
	for Thumb-2.
	(return): New expander.
	(*arm_return): New name for ARM return insn.
	* config/arm/thumb2.md (*thumb2_return): New insn pattern.

Co-Authored-By: Mark Mitchell <mark@codesourcery.com>
From-SVN: r159672

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 70704a80a01c8b730a3310eeada48245016d5c63..e7645576413febc29afd01b15ac99e2c3a0c751e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2010-05-21  Julian Brown  <julian@codesourcery.com>
+           Mark Mitchell  <mark@codesourcery.com>
+
+       * config/arm/arm.c (arm_function_ok_for_sibcall): Only forbid
+       sibling calls for Thumb-1.
+       * config/arm/arm.h (USE_RETURN_INSN): Enable for Thumb-2.
+       * config/arm/arm.md (*call_symbol, *call_value_symbol): Use for
+       Thumb-2.
+       (*call_insn, *call_value_insn): Don't use for Thumb-2.
+       (sibcall, sibcall_value, *sibcall_insn, *sibcall_value_insn): Use
+       for Thumb-2.
+       (return): New expander.
+       (*arm_return): New name for ARM return insn.
+       * config/arm/thumb2.md (*thumb2_return): New insn pattern.
+
 2010-05-19  Joel Sherrill <joel.sherrill@oarcorp.com>
 
        * config.gcc (sparc64-*-rtems*): New target.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index fe077f6453d1d598a3516ddd7edbd9708a729d20..7a7dea4838bd37f40a4fd84b8ba68ff43efc3c51 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4794,8 +4794,8 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
     return false;
 
   /* Never tailcall something for which we have no decl, or if we
-     are in Thumb mode.  */
-  if (decl == NULL || TARGET_THUMB)
+     are generating code for Thumb-1.  */
+  if (decl == NULL || TARGET_THUMB1)
     return false;
 
   /* The PIC register is live on entry to VxWorks PLT entries, so we

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index dc0a9f31ef4bf354fb873951e3e9819e09567204..b45f675b4bc8eb97f530e1099750072d5c773dec 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1814,10 +1814,8 @@ typedef struct
 
 /* Determine if the epilogue should be output as RTL.
    You should override this if you define FUNCTION_EXTRA_EPILOGUE.  */
-/* This is disabled for Thumb-2 because it will confuse the
-   conditional insn counter.  */
 #define USE_RETURN_INSN(ISCOND)                                \
-  (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0)
+  (TARGET_32BIT ? use_return_insn (ISCOND, NULL) : 0)
 
 /* Definitions for register eliminations.
 

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 9682ba12d25f48f34571cff957cac28486923a56..ab8bce43bc45076c1803e0b9553f755b89d7206b 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8650,7 +8650,7 @@
         (match_operand 1 "" ""))
    (use (match_operand 2 "" ""))
    (clobber (reg:SI LR_REGNUM))]
-  "TARGET_ARM
+  "TARGET_32BIT
    && (GET_CODE (operands[0]) == SYMBOL_REF)
    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))"
   "*
@@ -8666,7 +8666,7 @@
        (match_operand:SI 2 "" "")))
    (use (match_operand 3 "" ""))
    (clobber (reg:SI LR_REGNUM))]
-  "TARGET_ARM
+  "TARGET_32BIT
    && (GET_CODE (operands[1]) == SYMBOL_REF)
    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))"
   "*
@@ -8681,7 +8681,7 @@
         (match_operand:SI 1 "" ""))
    (use (match_operand 2 "" ""))
    (clobber (reg:SI LR_REGNUM))]
-  "TARGET_THUMB
+  "TARGET_THUMB1
    && GET_CODE (operands[0]) == SYMBOL_REF
    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))"
   "bl\\t%a0"
@@ -8695,7 +8695,7 @@
              (match_operand 2 "" "")))
    (use (match_operand 3 "" ""))
    (clobber (reg:SI LR_REGNUM))]
-  "TARGET_THUMB
+  "TARGET_THUMB1
    && GET_CODE (operands[1]) == SYMBOL_REF
    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))"
   "bl\\t%a1"
@@ -8709,7 +8709,7 @@
                    (match_operand 1 "general_operand" ""))
              (return)
              (use (match_operand 2 "" ""))])]
-  "TARGET_ARM"
+  "TARGET_32BIT"
   "
   {
     if (operands[2] == NULL_RTX)
@@ -8723,7 +8723,7 @@
                         (match_operand 2 "general_operand" "")))
              (return)
              (use (match_operand 3 "" ""))])]
-  "TARGET_ARM"
+  "TARGET_32BIT"
   "
   {
     if (operands[3] == NULL_RTX)
@@ -8736,7 +8736,7 @@
        (match_operand 1 "" ""))
   (return)
   (use (match_operand 2 "" ""))]
-  "TARGET_ARM && GET_CODE (operands[0]) == SYMBOL_REF"
+  "TARGET_32BIT && GET_CODE (operands[0]) == SYMBOL_REF"
   "*
   return NEED_PLT_RELOC ? \"b%?\\t%a0(PLT)\" : \"b%?\\t%a0\";
   "
@@ -8749,15 +8749,20 @@
             (match_operand 2 "" "")))
   (return)
   (use (match_operand 3 "" ""))]
-  "TARGET_ARM && GET_CODE (operands[1]) == SYMBOL_REF"
+  "TARGET_32BIT && GET_CODE (operands[1]) == SYMBOL_REF"
   "*
   return NEED_PLT_RELOC ? \"b%?\\t%a1(PLT)\" : \"b%?\\t%a1\";
   "
   [(set_attr "type" "call")]
 )
 
+(define_expand "return"
+  [(return)]
+  "TARGET_32BIT && USE_RETURN_INSN (FALSE)"
+  "")
+
 ;; Often the return insn will be the same as loading from memory, so set attr
-(define_insn "return"
+(define_insn "*arm_return"
   [(return)]
   "TARGET_ARM && USE_RETURN_INSN (FALSE)"
   "*

diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 9b8075296d540021b1d8fc0ba2a0a842ac4725d5..e97715ff595a8d13814481e107cf6fd81c14d438 100644 (file)
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -1054,6 +1054,19 @@
    (set_attr "length" "20")]
 )
 
+;; Note: this is not predicable, to avoid issues with linker-generated
+;; interworking stubs.
+(define_insn "*thumb2_return"
+  [(return)]
+  "TARGET_THUMB2 && USE_RETURN_INSN (FALSE)"
+  "*
+  {
+    return output_return_instruction (const_true_rtx, TRUE, FALSE);
+  }"
+  [(set_attr "type" "load1")
+   (set_attr "length" "12")]
+)
+
 (define_insn_and_split "thumb2_eh_return"
   [(unspec_volatile [(match_operand:SI 0 "s_register_operand" "r")]
                    VUNSPEC_EH_RETURN)