drm/i915: Enable fp16 + CCS on TGL+

TGL+ support compressed fp16 scanout. Enable it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240918144445.5716-6-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 415d8bb7143f26fc1c60d8cd31d4dc2acd2e0f0f..70ced57ab102196bb56f6b3203201819e051e83a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -87,6 +87,18 @@ static const struct drm_format_info gen12_ccs_formats[] = {
        { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
          .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_XRGB16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 1 }, .block_w = { 1, 1 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_XBGR16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 1 }, .block_w = { 1, 1 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_ARGB16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 1 }, .block_w = { 1, 1 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_ABGR16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 1 }, .block_w = { 1, 1 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
        { .format = DRM_FORMAT_YUYV, .num_planes = 2,
          .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
          .hsub = 2, .vsub = 1, .is_yuv = true },
@@ -145,6 +157,18 @@ static const struct drm_format_info gen12_ccs_cc_formats[] = {
        { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 3,
          .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_XRGB16161616F, .depth = 0, .num_planes = 3,
+         .char_per_block = { 8, 1, 0 }, .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_XBGR16161616F, .depth = 0, .num_planes = 3,
+         .char_per_block = { 8, 1, 0 }, .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_ARGB16161616F, .depth = 0, .num_planes = 3,
+         .char_per_block = { 8, 1, 0 }, .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_ABGR16161616F, .depth = 0, .num_planes = 3,
+         .char_per_block = { 8, 1, 0 }, .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
 };
 
 static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
@@ -172,6 +196,18 @@ static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
        { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
          .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_XRGB16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_XBGR16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_ARGB16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_ABGR16161616F, .depth = 0, .num_planes = 2,
+         .char_per_block = { 8, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
 };
 
 struct intel_modifier_desc {

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index d49bc0bef9390adabb673747234d2aa66978c6d8..ed0c9f565d7202bb865cf480c73fb4a1816d3bff 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2401,6 +2401,10 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
        case DRM_FORMAT_XBGR2101010:
        case DRM_FORMAT_ARGB2101010:
        case DRM_FORMAT_ABGR2101010:
+       case DRM_FORMAT_XBGR16161616F:
+       case DRM_FORMAT_ABGR16161616F:
+       case DRM_FORMAT_XRGB16161616F:
+       case DRM_FORMAT_ARGB16161616F:
                if (intel_fb_is_ccs_modifier(modifier))
                        return true;
                fallthrough;
@@ -2419,10 +2423,6 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
        case DRM_FORMAT_RGB565:
        case DRM_FORMAT_XVYU2101010:
        case DRM_FORMAT_C8:
-       case DRM_FORMAT_XBGR16161616F:
-       case DRM_FORMAT_ABGR16161616F:
-       case DRM_FORMAT_XRGB16161616F:
-       case DRM_FORMAT_ARGB16161616F:
        case DRM_FORMAT_Y210:
        case DRM_FORMAT_Y212:
        case DRM_FORMAT_Y216: