]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
Fixes for 6.0
authorSasha Levin <sashal@kernel.org>
Mon, 7 Nov 2022 12:12:36 +0000 (07:12 -0500)
committerSasha Levin <sashal@kernel.org>
Mon, 7 Nov 2022 12:12:36 +0000 (07:12 -0500)
Signed-off-by: Sasha Levin <sashal@kernel.org>
queue-6.0/clk-renesas-r8a779g0-add-sasyncper-clocks.patch [new file with mode: 0644]
queue-6.0/series

diff --git a/queue-6.0/clk-renesas-r8a779g0-add-sasyncper-clocks.patch b/queue-6.0/clk-renesas-r8a779g0-add-sasyncper-clocks.patch
new file mode 100644 (file)
index 0000000..0c6f6f7
--- /dev/null
@@ -0,0 +1,57 @@
+From 6160de834abaefbf3626d0d8c93c72c3336414d3 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 7 Oct 2022 15:10:00 +0200
+Subject: clk: renesas: r8a779g0: Add SASYNCPER clocks
+
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+
+[ Upstream commit ba5284ebe497044f37c9bb9c7b1564932f4b6610 ]
+
+On R-Car V4H, all PLLs except PLL5 support Spread Spectrum and/or
+Fractional Multiplication to reduce electromagnetic interference.
+
+Add the SASYNCPER and SASYNCPERD[124] clocks, which are used as clock
+sources for modules that must not be affected by Spread Spectrum and/or
+Fractional Multiplication.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Stephen Boyd <sboyd@kernel.org>
+Link: https://lore.kernel.org/r/d0f35c35e1f96c5a649ab477e7ba5d8025957cd0.1665147497.git.geert+renesas@glider.be
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/clk/renesas/r8a779g0-cpg-mssr.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+index c9c59c6f7139..7beb0e3b1872 100644
+--- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+@@ -47,6 +47,7 @@ enum clk_ids {
+       CLK_S0_VIO,
+       CLK_S0_VC,
+       CLK_S0_HSC,
++      CLK_SASYNCPER,
+       CLK_SV_VIP,
+       CLK_SV_IR,
+       CLK_SDSRC,
+@@ -84,6 +85,7 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = {
+       DEF_FIXED(".s0_vio",    CLK_S0_VIO,     CLK_PLL1_DIV2,  2, 1),
+       DEF_FIXED(".s0_vc",     CLK_S0_VC,      CLK_PLL1_DIV2,  2, 1),
+       DEF_FIXED(".s0_hsc",    CLK_S0_HSC,     CLK_PLL1_DIV2,  2, 1),
++      DEF_FIXED(".sasyncper", CLK_SASYNCPER,  CLK_PLL5_DIV4,  3, 1),
+       DEF_FIXED(".sv_vip",    CLK_SV_VIP,     CLK_PLL1,       5, 1),
+       DEF_FIXED(".sv_ir",     CLK_SV_IR,      CLK_PLL1,       5, 1),
+       DEF_BASE(".sdsrc",      CLK_SDSRC,      CLK_TYPE_GEN4_SDSRC, CLK_PLL5),
+@@ -128,6 +130,9 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = {
+       DEF_FIXED("s0d4_hsc",   R8A779G0_CLK_S0D4_HSC,  CLK_S0_HSC,     4, 1),
+       DEF_FIXED("cl16m_hsc",  R8A779G0_CLK_CL16M_HSC, CLK_S0_HSC,     48, 1),
+       DEF_FIXED("s0d2_cc",    R8A779G0_CLK_S0D2_CC,   CLK_S0,         2, 1),
++      DEF_FIXED("sasyncperd1",R8A779G0_CLK_SASYNCPERD1, CLK_SASYNCPER,1, 1),
++      DEF_FIXED("sasyncperd2",R8A779G0_CLK_SASYNCPERD2, CLK_SASYNCPER,2, 1),
++      DEF_FIXED("sasyncperd4",R8A779G0_CLK_SASYNCPERD4, CLK_SASYNCPER,4, 1),
+       DEF_FIXED("svd1_ir",    R8A779G0_CLK_SVD1_IR,   CLK_SV_IR,      1, 1),
+       DEF_FIXED("svd2_ir",    R8A779G0_CLK_SVD2_IR,   CLK_SV_IR,      2, 1),
+       DEF_FIXED("svd1_vip",   R8A779G0_CLK_SVD1_VIP,  CLK_SV_VIP,     1, 1),
+-- 
+2.35.1
+
index 98bd850ae86c3a2dc6e5c926784514cde53084d7..0ffc31242fceb3a67e6e30d5df671a78d0e15a37 100644 (file)
@@ -125,3 +125,4 @@ bluetooth-l2cap-fix-accepting-connection-request-for-invalid-spsm.patch
 bluetooth-l2cap-fix-attempting-to-access-uninitialized-memory.patch
 fscrypt-stop-using-keyrings-subsystem-for-fscrypt_master_key.patch
 fscrypt-fix-keyring-memory-leak-on-mount-failure.patch
+clk-renesas-r8a779g0-add-sasyncper-clocks.patch