arm64: dts: marvell: Move arch timer and pmu nodes to top-level

The Arm arch timer and PMU are not memory-mapped peripherals, and
therefore should not be under a "simple-bus" node. Move them to the
top-level like other platforms.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
index fdf88cd0eb029107927c35a59b4b23862d460466..e206d03a2867da3baa43faed5af49d6fcb80be98 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
@@ -48,6 +48,21 @@
                };
        };
 
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupt-parent = <&gic>;
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                               <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                               <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                               <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+       };
+
+       pmu {
+               compatible = "arm,cortex-a72-pmu";
+               interrupt-parent = <&pic>;
+               interrupts = <17>;
+       };
+
        AP_NAME {
                #address-cells = <2>;
                #size-cells = <2>;
@@ -122,20 +137,6 @@
                                };
                        };
 
-                       timer {
-                               compatible = "arm,armv8-timer";
-                               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
-                       };
-
-                       pmu {
-                               compatible = "arm,cortex-a72-pmu";
-                               interrupt-parent = <&pic>;
-                               interrupts = <17>;
-                       };
-
                        odmi: odmi@300000 {
                                compatible = "marvell,odmi-controller";
                                msi-controller;

diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi b/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi
index f824eb56b0e26d97b73413e080b72f30ca45e5b7..b239df244ec5936fecf0cd3816ef312933ca60ce 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi
@@ -12,6 +12,7 @@
 / {
        #address-cells = <2>;
        #size-cells = <2>;
+       interrupt-parent = <&gic>;
 
        aliases {
                serial0 = &uart0_ap0;
@@ -23,11 +24,18 @@
                method = "smc";
        };
 
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                               <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                               <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                               <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+       };
+
        ap810-ap0 {
                #address-cells = <2>;
                #size-cells = <2>;
                compatible = "simple-bus";
-               interrupt-parent = <&gic>;
                ranges;
 
                config-space@e8000000 {
@@ -60,14 +68,6 @@
                                };
                        };
 
-                       timer {
-                               compatible = "arm,armv8-timer";
-                               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
-                                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
-                                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
-                                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
-                       };
-
                        xor@400000 {
                                compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
                                reg = <0x400000 0x1000>,