]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
clk: renesas: r8a779h0: Add CSI-2 clocks
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Mon, 27 May 2024 13:15:41 +0000 (15:15 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 3 Jun 2024 07:46:18 +0000 (09:46 +0200)
Add the CSI40 and CSI41 module clocks, which are used by the CSI-2
interfaces on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240527131541.1676525-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779h0-cpg-mssr.c

index c9bea479a18eb8bd235f805827215855404d8acb..034e375f31fe77db2728fdf689fb3e1deabdf1fb 100644 (file)
@@ -176,6 +176,8 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
        DEF_MOD("avb0:rgmii0",  211,    R8A779H0_CLK_S0D8_HSC),
        DEF_MOD("avb1:rgmii1",  212,    R8A779H0_CLK_S0D8_HSC),
        DEF_MOD("avb2:rgmii2",  213,    R8A779H0_CLK_S0D8_HSC),
+       DEF_MOD("csi40",        331,    R8A779H0_CLK_CSI),
+       DEF_MOD("csi41",        400,    R8A779H0_CLK_CSI),
        DEF_MOD("hscif0",       514,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif1",       515,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif2",       516,    R8A779H0_CLK_SASYNCPERD1),