--- /dev/null
+From 1c70c0cebd1295a42fec75045b8a6b4419cedef3 Mon Sep 17 00:00:00 2001
+From: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date: Wed, 29 Jun 2011 13:34:36 -0700
+Subject: drm/i915: enable ring freq scaling, RC6 and graphics turbo on Ivy Bridge v3
+
+From: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 1c70c0cebd1295a42fec75045b8a6b4419cedef3 upstream.
+
+They use the same register interfaces, so we can simply enable the
+existing code on IVB.
+
+v2:
+ - resolve conflict with ring freq scaling, we can enable it too
+v3:
+ - resolve conflict again, this time on drm-intel-next
+
+Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Keith Packard <keithp@keithp.com>
+Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
+Acked-by: Leann Ogasawara <leann.ogasawara@canonical.com>
+Acked-by: Herton Krzesinski <herton.krzesinski@canonical.com>
+Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
+ drivers/gpu/drm/i915/intel_display.c | 4 ++--
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_debugfs.c
++++ b/drivers/gpu/drm/i915/i915_debugfs.c
+@@ -865,7 +865,7 @@ static int i915_cur_delayinfo(struct seq
+ MEMSTAT_VID_SHIFT);
+ seq_printf(m, "Current P-state: %d\n",
+ (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
+- } else if (IS_GEN6(dev)) {
++ } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
+ u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
+ u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
+ u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -7943,7 +7943,7 @@ void intel_modeset_init(struct drm_devic
+ intel_init_emon(dev);
+ }
+
+- if (IS_GEN6(dev))
++ if (IS_GEN6(dev) || IS_GEN7(dev))
+ gen6_enable_rps(dev_priv);
+
+ INIT_WORK(&dev_priv->idle_work, intel_idle_update);
+@@ -7985,7 +7985,7 @@ void intel_modeset_cleanup(struct drm_de
+
+ if (IS_IRONLAKE_M(dev))
+ ironlake_disable_drps(dev);
+- if (IS_GEN6(dev))
++ if (IS_GEN6(dev) || IS_GEN7(dev))
+ gen6_disable_rps(dev);
+
+ if (IS_IRONLAKE_M(dev))
revert-leds-save-the-delay-values-after-a-successful-call-to-blink_set.patch
drm-radeon-add-some-missing-firemv-pci-ids.patch
drm-radeon-kms-fix-up-gpio-i2c-mask-bits-for-r4xx.patch
+drm-i915-enable-ring-freq-scaling-rc6-and-graphics-turbo-on-ivy-bridge-v3.patch
+sfi-table-irq-0xff-means-no-interrupt.patch
+x86-mrst-use-a-temporary-variable-for-sfi-irq.patch
--- /dev/null
+From a94cc4e6c0a26a7c8f79a432ab2c89534aa674d5 Mon Sep 17 00:00:00 2001
+From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
+Date: Fri, 26 Aug 2011 12:20:59 +0100
+Subject: sfi: table irq 0xFF means 'no interrupt'
+
+From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
+
+commit a94cc4e6c0a26a7c8f79a432ab2c89534aa674d5 upstream.
+
+According to the SFI specification irq number 0xFF means device has no
+interrupt or interrupt attached via GPIO.
+
+Currently, we don't handle this special case and set irq field in
+*_board_info structs to 255. It leads to confusion in some drivers.
+Accelerometer driver tries to register interrupt 255, fails and prints
+"Cannot get IRQ" to dmesg.
+
+Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
+Signed-off-by: Alan Cox <alan@linux.intel.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/x86/platform/mrst/mrst.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/platform/mrst/mrst.c
++++ b/arch/x86/platform/mrst/mrst.c
+@@ -689,7 +689,9 @@ static int __init sfi_parse_devs(struct
+ irq_attr.trigger = 1;
+ irq_attr.polarity = 1;
+ io_apic_set_pci_routing(NULL, pentry->irq, &irq_attr);
+- }
++ } else
++ pentry->irq = 0; /* No irq */
++
+ switch (pentry->type) {
+ case SFI_DEV_TYPE_IPC:
+ /* ID as IRQ is a hack that will go away */
--- /dev/null
+From 153b19a3b9fd8b9478495b9ee1f93f6a77c564f9 Mon Sep 17 00:00:00 2001
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+Date: Thu, 13 Oct 2011 12:04:20 +0300
+Subject: x86, mrst: use a temporary variable for SFI irq
+
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+
+commit 153b19a3b9fd8b9478495b9ee1f93f6a77c564f9 upstream.
+
+SFI tables reside in RAM and should not be modified once they are
+written. Current code went to set pentry->irq to zero which causes
+subsequent reads to fail with invalid SFI table checksum. This will
+break kexec as the second kernel fails to validate SFI tables.
+
+To fix this we use temporary variable for irq number.
+
+Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Reviewed-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/x86/platform/mrst/mrst.c | 22 ++++++++++++----------
+ 1 file changed, 12 insertions(+), 10 deletions(-)
+
+--- a/arch/x86/platform/mrst/mrst.c
++++ b/arch/x86/platform/mrst/mrst.c
+@@ -678,38 +678,40 @@ static int __init sfi_parse_devs(struct
+ pentry = (struct sfi_device_table_entry *)sb->pentry;
+
+ for (i = 0; i < num; i++, pentry++) {
+- if (pentry->irq != (u8)0xff) { /* native RTE case */
++ int irq = pentry->irq;
++
++ if (irq != (u8)0xff) { /* native RTE case */
+ /* these SPI2 devices are not exposed to system as PCI
+ * devices, but they have separate RTE entry in IOAPIC
+ * so we have to enable them one by one here
+ */
+- ioapic = mp_find_ioapic(pentry->irq);
++ ioapic = mp_find_ioapic(irq);
+ irq_attr.ioapic = ioapic;
+- irq_attr.ioapic_pin = pentry->irq;
++ irq_attr.ioapic_pin = irq;
+ irq_attr.trigger = 1;
+ irq_attr.polarity = 1;
+- io_apic_set_pci_routing(NULL, pentry->irq, &irq_attr);
++ io_apic_set_pci_routing(NULL, irq, &irq_attr);
+ } else
+- pentry->irq = 0; /* No irq */
++ irq = 0; /* No irq */
+
+ switch (pentry->type) {
+ case SFI_DEV_TYPE_IPC:
+ /* ID as IRQ is a hack that will go away */
+- pdev = platform_device_alloc(pentry->name, pentry->irq);
++ pdev = platform_device_alloc(pentry->name, irq);
+ if (pdev == NULL) {
+ pr_err("out of memory for SFI platform device '%s'.\n",
+ pentry->name);
+ continue;
+ }
+- install_irq_resource(pdev, pentry->irq);
++ install_irq_resource(pdev, irq);
+ pr_debug("info[%2d]: IPC bus, name = %16.16s, "
+- "irq = 0x%2x\n", i, pentry->name, pentry->irq);
++ "irq = 0x%2x\n", i, pentry->name, irq);
+ sfi_handle_ipc_dev(pdev);
+ break;
+ case SFI_DEV_TYPE_SPI:
+ memset(&spi_info, 0, sizeof(spi_info));
+ strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
+- spi_info.irq = pentry->irq;
++ spi_info.irq = irq;
+ spi_info.bus_num = pentry->host_num;
+ spi_info.chip_select = pentry->addr;
+ spi_info.max_speed_hz = pentry->max_freq;
+@@ -726,7 +728,7 @@ static int __init sfi_parse_devs(struct
+ memset(&i2c_info, 0, sizeof(i2c_info));
+ bus = pentry->host_num;
+ strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
+- i2c_info.irq = pentry->irq;
++ i2c_info.irq = irq;
+ i2c_info.addr = pentry->addr;
+ pr_debug("info[%2d]: I2C bus = %d, name = %16.16s, "
+ "irq = 0x%2x, addr = 0x%x\n", i, bus,
projects / thirdparty / kernel / stable-queue.git / commitdiff
