a1: clk: Add missing USB_PHY_IN and USB_PHY gates

We use this clocks in dwc3 driver.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-7-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
index 3aec42f33bee5b115e166d41b477f9c6cdb75485..1075ba73339977a386ec37f563cad71ac36c5663 100644 (file)
--- a/drivers/clk/meson/a1.c
+++ b/drivers/clk/meson/a1.c
@@ -238,6 +238,12 @@ static const struct meson_clk_info *meson_clocks[] = {
        [CLKID_FIXPLL_IN] = CLK_GATE("fixpll_in", A1_SYS_OSCIN_CTRL, 1,
                EXTERNAL_XTAL
        ),
+       [CLKID_USB_PHY_IN] = CLK_GATE("usb_phy_in", A1_SYS_OSCIN_CTRL, 2,
+               EXTERNAL_XTAL
+       ),
+       [CLKID_USB_PHY] = CLK_GATE("usb_phy", A1_SYS_CLK_EN0, 27,
+               CLKID_SYS
+       ),
        [CLKID_SARADC] = CLK_GATE("saradc", A1_SAR_ADC_CLK_CTR, 8,
                -ENOENT
        ),