arm64: dts: cix: add a compatible string for the cix sky1 SoC

The SPI IP design for the cix sky1 SoC uses a FIFO with a data width
of 32 bits, instead of the default 8 bits. Therefore, a compatible
string is added to specify the FIFO data width configuration for the
cix sky1 SoC.

Signed-off-by: Jun Guo <jun.guo@cixtech.com>
Link: https://lore.kernel.org/r/20251031073003.3289573-4-jun.guo@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>

diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index f4be70a6278b25f8ee7820ab375af482ed6a64b1..64b76905cbff5eb5f1010e426832a86295158f1d 100644 (file)
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -265,7 +265,7 @@
                };
 
                spi0: spi@4090000 {
-                       compatible = "cdns,spi-r1p6";
+                       compatible = "cix,sky1-spi-r1p6", "cdns,spi-r1p6";
                        reg = <0x0 0x04090000 0x0 0x10000>;
                        clocks = <&scmi_clk CLK_TREE_FCH_SPI0_APB>,
                                 <&scmi_clk CLK_TREE_FCH_SPI0_APB>;
@@ -275,7 +275,7 @@
                };
 
                spi1: spi@40a0000 {
-                       compatible = "cdns,spi-r1p6";
+                       compatible = "cix,sky1-spi-r1p6", "cdns,spi-r1p6";
                        reg = <0x0 0x040a0000 0x0 0x10000>;
                        clocks = <&scmi_clk CLK_TREE_FCH_SPI1_APB>,
                                 <&scmi_clk CLK_TREE_FCH_SPI1_APB>;