]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
Fixes for 6.6
authorSasha Levin <sashal@kernel.org>
Sun, 7 Apr 2024 12:53:26 +0000 (08:53 -0400)
committerSasha Levin <sashal@kernel.org>
Sun, 7 Apr 2024 12:53:26 +0000 (08:53 -0400)
Signed-off-by: Sasha Levin <sashal@kernel.org>
28 files changed:
queue-6.6/drm-amd-add-concept-of-running-prepare_suspend-seque.patch [new file with mode: 0644]
queue-6.6/drm-amd-display-fix-dpstream-clk-on-and-off-sequence.patch [new file with mode: 0644]
queue-6.6/drm-amd-display-prevent-crash-when-disable-stream.patch [new file with mode: 0644]
queue-6.6/drm-amd-evict-resources-during-pm-ops-prepare-callba.patch [new file with mode: 0644]
queue-6.6/drm-amd-flush-gfxoff-requests-in-prepare-stage.patch [new file with mode: 0644]
queue-6.6/e1000e-minor-flow-correction-in-e1000_shutdown-funct.patch [new file with mode: 0644]
queue-6.6/e1000e-move-force-smbus-from-enable-ulp-function-to-.patch [new file with mode: 0644]
queue-6.6/e1000e-workaround-for-sporadic-mdi-error-on-meteor-l.patch [new file with mode: 0644]
queue-6.6/i40e-enforce-software-interrupt-during-busy-poll-exi.patch [new file with mode: 0644]
queue-6.6/i40e-move-memory-allocation-structures-to-i40e_alloc.patch [new file with mode: 0644]
queue-6.6/i40e-refactor-i40e_mdio_clause-macros.patch [new file with mode: 0644]
queue-6.6/i40e-remove-_t-suffix-from-enum-type-names.patch [new file with mode: 0644]
queue-6.6/i40e-remove-back-pointer-from-i40e_hw-structure.patch [new file with mode: 0644]
queue-6.6/i40e-remove-circular-header-dependencies-and-fix-hea.patch [new file with mode: 0644]
queue-6.6/i40e-simplify-memory-allocation-functions.patch [new file with mode: 0644]
queue-6.6/i40e-split-i40e_osdep.h.patch [new file with mode: 0644]
queue-6.6/intel-add-bit-macro-includes-where-needed.patch [new file with mode: 0644]
queue-6.6/intel-legacy-field-get-conversion.patch [new file with mode: 0644]
queue-6.6/kvm-svm-add-support-for-allowing-zero-sev-asids.patch [new file with mode: 0644]
queue-6.6/kvm-svm-use-unsigned-integers-when-dealing-with-asid.patch [new file with mode: 0644]
queue-6.6/net-ravb-always-process-tx-descriptor-ring.patch [new file with mode: 0644]
queue-6.6/net-ravb-always-update-error-counters.patch [new file with mode: 0644]
queue-6.6/net-ravb-let-ip-specific-receive-function-to-interro.patch [new file with mode: 0644]
queue-6.6/scsi-sg-avoid-sg-device-teardown-race.patch [new file with mode: 0644]
queue-6.6/series
queue-6.6/usb-typec-ucsi-check-for-notifications-after-init.patch [new file with mode: 0644]
queue-6.6/usb-typec-ucsi-fix-race-between-typec_switch-and-rol.patch [new file with mode: 0644]
queue-6.6/virtchnl-add-header-dependencies.patch [new file with mode: 0644]

diff --git a/queue-6.6/drm-amd-add-concept-of-running-prepare_suspend-seque.patch b/queue-6.6/drm-amd-add-concept-of-running-prepare_suspend-seque.patch
new file mode 100644 (file)
index 0000000..d15e96b
--- /dev/null
@@ -0,0 +1,73 @@
+From 3acd6b15ab8ca78e01c5ab003e5c3a136722ea0d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 6 Oct 2023 13:50:21 -0500
+Subject: drm/amd: Add concept of running prepare_suspend() sequence for IP
+ blocks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Mario Limonciello <mario.limonciello@amd.com>
+
+[ Upstream commit cb11ca3233aa3303dc11dca25977d2e7f24be00f ]
+
+If any IP blocks allocate memory during their hw_fini() sequence
+this can cause the suspend to fail under memory pressure.  Introduce
+a new phase that IP blocks can use to allocate memory before suspend
+starts so that it can potentially be evicted into swap instead.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Stable-dep-of: ca299b4512d4 ("drm/amd: Flush GFXOFF requests in prepare stage")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++++++++++-
+ drivers/gpu/drm/amd/include/amd_shared.h   |  1 +
+ 2 files changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+index 707c17641c757..4ebe42395708f 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -4107,7 +4107,7 @@ static int amdgpu_device_evict_resources(struct amdgpu_device *adev)
+ int amdgpu_device_prepare(struct drm_device *dev)
+ {
+       struct amdgpu_device *adev = drm_to_adev(dev);
+-      int r;
++      int i, r;
+       if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+               return 0;
+@@ -4117,6 +4117,16 @@ int amdgpu_device_prepare(struct drm_device *dev)
+       if (r)
+               return r;
++      for (i = 0; i < adev->num_ip_blocks; i++) {
++              if (!adev->ip_blocks[i].status.valid)
++                      continue;
++              if (!adev->ip_blocks[i].version->funcs->prepare_suspend)
++                      continue;
++              r = adev->ip_blocks[i].version->funcs->prepare_suspend((void *)adev);
++              if (r)
++                      return r;
++      }
++
+       return 0;
+ }
+diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
+index abe829bbd54af..a9880fc531955 100644
+--- a/drivers/gpu/drm/amd/include/amd_shared.h
++++ b/drivers/gpu/drm/amd/include/amd_shared.h
+@@ -295,6 +295,7 @@ struct amd_ip_funcs {
+       int (*hw_init)(void *handle);
+       int (*hw_fini)(void *handle);
+       void (*late_fini)(void *handle);
++      int (*prepare_suspend)(void *handle);
+       int (*suspend)(void *handle);
+       int (*resume)(void *handle);
+       bool (*is_idle)(void *handle);
+-- 
+2.43.0
+
diff --git a/queue-6.6/drm-amd-display-fix-dpstream-clk-on-and-off-sequence.patch b/queue-6.6/drm-amd-display-fix-dpstream-clk-on-and-off-sequence.patch
new file mode 100644 (file)
index 0000000..10654a9
--- /dev/null
@@ -0,0 +1,77 @@
+From 9f9f3f0d764a6c0c9462e9e05b2da5be458c9b17 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 17 Jan 2024 16:46:02 -0500
+Subject: drm/amd/display: Fix DPSTREAM CLK on and off sequence
+
+From: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
+
+[ Upstream commit e8d131285c98927554cd007f47cedc4694bfedde ]
+
+[Why]
+Secondary DP2 display fails to light up in some instances
+
+[How]
+Clock needs to be on when DPSTREAMCLK*_EN =1. This change
+moves dtbclk_p enable/disable point to make sure this is
+the case
+
+Reviewed-by: Charlene Liu <charlene.liu@amd.com>
+Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
+Acked-by: Tom Chung <chiahsuan.chung@amd.com>
+Signed-off-by: Daniel Miess <daniel.miess@amd.com>
+Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
+Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Stable-dep-of: 72d72e8fddbc ("drm/amd/display: Prevent crash when disable stream")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ .../drm/amd/display/dc/dce110/dce110_hw_sequencer.c   |  2 +-
+ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c    | 11 +++++------
+ 2 files changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+index 251dd800a2a66..2ac41c2a7238c 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+@@ -1179,9 +1179,9 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
+               dto_params.timing = &pipe_ctx->stream->timing;
+               dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
+               if (dccg) {
+-                      dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
+                       dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
+                       dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
++                      dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
+               }
+       } else if (dccg && dccg->funcs->disable_symclk_se) {
+               dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+index 1e3803739ae61..12af2859002f7 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+@@ -2728,18 +2728,17 @@ void dcn20_enable_stream(struct pipe_ctx *pipe_ctx)
+       }
+       if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
+-              dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
+-              dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);
+-
+-              phyd32clk = get_phyd32clk_src(link);
+-              dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);
+-
+               dto_params.otg_inst = tg->inst;
+               dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;
+               dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);
+               dto_params.timing = &pipe_ctx->stream->timing;
+               dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);
+               dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
++              dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
++              dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);
++
++              phyd32clk = get_phyd32clk_src(link);
++              dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);
+       } else {
+               }
+       if (hws->funcs.calculate_dccg_k1_k2_values && dc->res_pool->dccg->funcs->set_pixel_rate_div) {
+-- 
+2.43.0
+
diff --git a/queue-6.6/drm-amd-display-prevent-crash-when-disable-stream.patch b/queue-6.6/drm-amd-display-prevent-crash-when-disable-stream.patch
new file mode 100644 (file)
index 0000000..c1542f1
--- /dev/null
@@ -0,0 +1,45 @@
+From 1cdb24e30ca5071d2500f69e47bc2ed35a05fa8d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 5 Mar 2024 17:41:15 -0500
+Subject: drm/amd/display: Prevent crash when disable stream
+
+From: Chris Park <chris.park@amd.com>
+
+[ Upstream commit 72d72e8fddbcd6c98e1b02d32cf6f2b04e10bd1c ]
+
+[Why]
+Disabling stream encoder invokes a function that no longer exists.
+
+[How]
+Check if the function declaration is NULL in disable stream encoder.
+
+Cc: Mario Limonciello <mario.limonciello@amd.com>
+Cc: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Reviewed-by: Charlene Liu <charlene.liu@amd.com>
+Acked-by: Wayne Lin <wayne.lin@amd.com>
+Signed-off-by: Chris Park <chris.park@amd.com>
+Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+index 2ac41c2a7238c..7b5c1498941dd 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+@@ -1181,7 +1181,8 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
+               if (dccg) {
+                       dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
+                       dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
+-                      dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
++                      if (dccg && dccg->funcs->set_dtbclk_dto)
++                              dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
+               }
+       } else if (dccg && dccg->funcs->disable_symclk_se) {
+               dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
+-- 
+2.43.0
+
diff --git a/queue-6.6/drm-amd-evict-resources-during-pm-ops-prepare-callba.patch b/queue-6.6/drm-amd-evict-resources-during-pm-ops-prepare-callba.patch
new file mode 100644 (file)
index 0000000..2e22e36
--- /dev/null
@@ -0,0 +1,140 @@
+From fb3b984cfc3edbbb2c040c67a93f7a5b04775ad2 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 6 Oct 2023 13:50:20 -0500
+Subject: drm/amd: Evict resources during PM ops prepare() callback
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Mario Limonciello <mario.limonciello@amd.com>
+
+[ Upstream commit 5095d5418193eb2748c7d8553c7150b8f1c44696 ]
+
+Linux PM core has a prepare() callback run before suspend.
+
+If the system is under high memory pressure, the resources may need
+to be evicted into swap instead.  If the storage backing for swap
+is offlined during the suspend() step then such a call may fail.
+
+So move this step into prepare() to move evict majority of
+resources and update all non-pmops callers to call the same callback.
+
+Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Stable-dep-of: ca299b4512d4 ("drm/amd: Flush GFXOFF requests in prepare stage")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 31 ++++++++++++++++++----
+ drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    | 10 ++++---
+ 3 files changed, 34 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+index 85efd686e538d..d59e8536192ca 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+@@ -1369,6 +1369,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
+ void amdgpu_driver_release_kms(struct drm_device *dev);
+ int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
++int amdgpu_device_prepare(struct drm_device *dev);
+ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon);
+ int amdgpu_device_resume(struct drm_device *dev, bool fbcon);
+ u32 amdgpu_get_vblank_counter_kms(struct drm_crtc *crtc);
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+index 79261bec26542..707c17641c757 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -1549,6 +1549,7 @@ static void amdgpu_switcheroo_set_state(struct pci_dev *pdev,
+       } else {
+               pr_info("switched off\n");
+               dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
++              amdgpu_device_prepare(dev);
+               amdgpu_device_suspend(dev, true);
+               amdgpu_device_cache_pci_state(pdev);
+               /* Shut down the device */
+@@ -4094,6 +4095,31 @@ static int amdgpu_device_evict_resources(struct amdgpu_device *adev)
+ /*
+  * Suspend & resume.
+  */
++/**
++ * amdgpu_device_prepare - prepare for device suspend
++ *
++ * @dev: drm dev pointer
++ *
++ * Prepare to put the hw in the suspend state (all asics).
++ * Returns 0 for success or an error on failure.
++ * Called at driver suspend.
++ */
++int amdgpu_device_prepare(struct drm_device *dev)
++{
++      struct amdgpu_device *adev = drm_to_adev(dev);
++      int r;
++
++      if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
++              return 0;
++
++      /* Evict the majority of BOs before starting suspend sequence */
++      r = amdgpu_device_evict_resources(adev);
++      if (r)
++              return r;
++
++      return 0;
++}
++
+ /**
+  * amdgpu_device_suspend - initiate device suspend
+  *
+@@ -4114,11 +4140,6 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
+       adev->in_suspend = true;
+-      /* Evict the majority of BOs before grabbing the full access */
+-      r = amdgpu_device_evict_resources(adev);
+-      if (r)
+-              return r;
+-
+       if (amdgpu_sriov_vf(adev)) {
+               amdgpu_virt_fini_data_exchange(adev);
+               r = amdgpu_virt_request_full_gpu(adev, false);
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+index 3204c3a42f2a3..f9bc38d20ce3e 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+@@ -2386,8 +2386,9 @@ static int amdgpu_pmops_prepare(struct device *dev)
+       /* Return a positive number here so
+        * DPM_FLAG_SMART_SUSPEND works properly
+        */
+-      if (amdgpu_device_supports_boco(drm_dev))
+-              return pm_runtime_suspended(dev);
++      if (amdgpu_device_supports_boco(drm_dev) &&
++          pm_runtime_suspended(dev))
++              return 1;
+       /* if we will not support s3 or s2i for the device
+        *  then skip suspend
+@@ -2396,7 +2397,7 @@ static int amdgpu_pmops_prepare(struct device *dev)
+           !amdgpu_acpi_is_s3_active(adev))
+               return 1;
+-      return 0;
++      return amdgpu_device_prepare(drm_dev);
+ }
+ static void amdgpu_pmops_complete(struct device *dev)
+@@ -2598,6 +2599,9 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)
+       if (amdgpu_device_supports_boco(drm_dev))
+               adev->mp1_state = PP_MP1_STATE_UNLOAD;
++      ret = amdgpu_device_prepare(drm_dev);
++      if (ret)
++              return ret;
+       ret = amdgpu_device_suspend(drm_dev, false);
+       if (ret) {
+               adev->in_runpm = false;
+-- 
+2.43.0
+
diff --git a/queue-6.6/drm-amd-flush-gfxoff-requests-in-prepare-stage.patch b/queue-6.6/drm-amd-flush-gfxoff-requests-in-prepare-stage.patch
new file mode 100644 (file)
index 0000000..0eb2358
--- /dev/null
@@ -0,0 +1,47 @@
+From 821d6c4dd4680b8ea0d918b54bd6707967383e11 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 20 Mar 2024 13:32:21 -0500
+Subject: drm/amd: Flush GFXOFF requests in prepare stage
+
+From: Mario Limonciello <mario.limonciello@amd.com>
+
+[ Upstream commit ca299b4512d4b4f516732a48ce9aa19d91f4473e ]
+
+If the system hasn't entered GFXOFF when suspend starts it can cause
+hangs accessing GC and RLC during the suspend stage.
+
+Cc: <stable@vger.kernel.org> # 6.1.y: 5095d5418193 ("drm/amd: Evict resources during PM ops prepare() callback")
+Cc: <stable@vger.kernel.org> # 6.1.y: cb11ca3233aa ("drm/amd: Add concept of running prepare_suspend() sequence for IP blocks")
+Cc: <stable@vger.kernel.org> # 6.1.y: 2ceec37b0e3d ("drm/amd: Add missing kernel doc for prepare_suspend()")
+Cc: <stable@vger.kernel.org> # 6.1.y: 3a9626c816db ("drm/amd: Stop evicting resources on APUs in suspend")
+Cc: <stable@vger.kernel.org> # 6.6.y: 5095d5418193 ("drm/amd: Evict resources during PM ops prepare() callback")
+Cc: <stable@vger.kernel.org> # 6.6.y: cb11ca3233aa ("drm/amd: Add concept of running prepare_suspend() sequence for IP blocks")
+Cc: <stable@vger.kernel.org> # 6.6.y: 2ceec37b0e3d ("drm/amd: Add missing kernel doc for prepare_suspend()")
+Cc: <stable@vger.kernel.org> # 6.6.y: 3a9626c816db ("drm/amd: Stop evicting resources on APUs in suspend")
+Cc: <stable@vger.kernel.org> # 6.1+
+Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3132
+Fixes: ab4750332dbe ("drm/amdgpu/sdma5.2: add begin/end_use ring callbacks")
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+index 4ebe42395708f..062d78818da16 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -4117,6 +4117,8 @@ int amdgpu_device_prepare(struct drm_device *dev)
+       if (r)
+               return r;
++      flush_delayed_work(&adev->gfx.gfx_off_delay_work);
++
+       for (i = 0; i < adev->num_ip_blocks; i++) {
+               if (!adev->ip_blocks[i].status.valid)
+                       continue;
+-- 
+2.43.0
+
diff --git a/queue-6.6/e1000e-minor-flow-correction-in-e1000_shutdown-funct.patch b/queue-6.6/e1000e-minor-flow-correction-in-e1000_shutdown-funct.patch
new file mode 100644 (file)
index 0000000..1e76141
--- /dev/null
@@ -0,0 +1,51 @@
+From fbffa151b56ce61c3a492873630ba312a998f53c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 1 Mar 2024 10:48:05 -0800
+Subject: e1000e: Minor flow correction in e1000_shutdown function
+
+From: Vitaly Lifshits <vitaly.lifshits@intel.com>
+
+[ Upstream commit 662200e324daebe6859c1f0f3ea1538b0561425a ]
+
+Add curly braces to avoid entering to an if statement where it is not
+always required in e1000_shutdown function.
+This improves code readability and might prevent non-deterministic
+behaviour in the future.
+
+Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
+Tested-by: Naama Meir <naamax.meir@linux.intel.com>
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Link: https://lore.kernel.org/r/20240301184806.2634508-5-anthony.l.nguyen@intel.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+Stable-dep-of: 861e8086029e ("e1000e: move force SMBUS from enable ulp function to avoid PHY loss issue")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/e1000e/netdev.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
+index af5d9d97a0d6c..cc8c531ec3dff 100644
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -6688,14 +6688,14 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
+       if (adapter->hw.phy.type == e1000_phy_igp_3) {
+               e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
+       } else if (hw->mac.type >= e1000_pch_lpt) {
+-              if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
++              if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC))) {
+                       /* ULP does not support wake from unicast, multicast
+                        * or broadcast.
+                        */
+                       retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
+-
+-              if (retval)
+-                      return retval;
++                      if (retval)
++                              return retval;
++              }
+       }
+       /* Ensure that the appropriate bits are set in LPI_CTRL
+-- 
+2.43.0
+
diff --git a/queue-6.6/e1000e-move-force-smbus-from-enable-ulp-function-to-.patch b/queue-6.6/e1000e-move-force-smbus-from-enable-ulp-function-to-.patch
new file mode 100644 (file)
index 0000000..957fa4f
--- /dev/null
@@ -0,0 +1,99 @@
+From a23984c241b41b956c1f8aacf0b3649e0caafe31 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 3 Mar 2024 12:51:32 +0200
+Subject: e1000e: move force SMBUS from enable ulp function to avoid PHY loss
+ issue
+
+From: Vitaly Lifshits <vitaly.lifshits@intel.com>
+
+[ Upstream commit 861e8086029e003305750b4126ecd6617465f5c7 ]
+
+Forcing SMBUS inside the ULP enabling flow leads to sporadic PHY loss on
+some systems. It is suspected to be caused by initiating PHY transactions
+before the interface settles.
+
+Separating this configuration from the ULP enabling flow and moving it to
+the shutdown function allows enough time for the interface to settle and
+avoids adding a delay.
+
+Fixes: 6607c99e7034 ("e1000e: i219 - fix to enable both ULP and EEE in Sx state")
+Co-developed-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
+Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
+Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
+Tested-by: Naama Meir <naamax.meir@linux.intel.com>
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/e1000e/ich8lan.c | 19 -------------------
+ drivers/net/ethernet/intel/e1000e/netdev.c  | 18 ++++++++++++++++++
+ 2 files changed, 18 insertions(+), 19 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
+index 717c52913e84b..4d83c9a0c023a 100644
+--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
++++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
+@@ -1165,25 +1165,6 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
+       if (ret_val)
+               goto out;
+-      /* Switching PHY interface always returns MDI error
+-       * so disable retry mechanism to avoid wasting time
+-       */
+-      e1000e_disable_phy_retry(hw);
+-
+-      /* Force SMBus mode in PHY */
+-      ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);
+-      if (ret_val)
+-              goto release;
+-      phy_reg |= CV_SMB_CTRL_FORCE_SMBUS;
+-      e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);
+-
+-      e1000e_enable_phy_retry(hw);
+-
+-      /* Force SMBus mode in MAC */
+-      mac_reg = er32(CTRL_EXT);
+-      mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;
+-      ew32(CTRL_EXT, mac_reg);
+-
+       /* Si workaround for ULP entry flow on i127/rev6 h/w.  Enable
+        * LPLU and disable Gig speed when entering ULP
+        */
+diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
+index cc8c531ec3dff..3692fce201959 100644
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -6623,6 +6623,7 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
+       struct e1000_hw *hw = &adapter->hw;
+       u32 ctrl, ctrl_ext, rctl, status, wufc;
+       int retval = 0;
++      u16 smb_ctrl;
+       /* Runtime suspend should only enable wakeup for link changes */
+       if (runtime)
+@@ -6696,6 +6697,23 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
+                       if (retval)
+                               return retval;
+               }
++
++              /* Force SMBUS to allow WOL */
++              /* Switching PHY interface always returns MDI error
++               * so disable retry mechanism to avoid wasting time
++               */
++              e1000e_disable_phy_retry(hw);
++
++              e1e_rphy(hw, CV_SMB_CTRL, &smb_ctrl);
++              smb_ctrl |= CV_SMB_CTRL_FORCE_SMBUS;
++              e1e_wphy(hw, CV_SMB_CTRL, smb_ctrl);
++
++              e1000e_enable_phy_retry(hw);
++
++              /* Force SMBus mode in MAC */
++              ctrl_ext = er32(CTRL_EXT);
++              ctrl_ext |= E1000_CTRL_EXT_FORCE_SMBUS;
++              ew32(CTRL_EXT, ctrl_ext);
+       }
+       /* Ensure that the appropriate bits are set in LPI_CTRL
+-- 
+2.43.0
+
diff --git a/queue-6.6/e1000e-workaround-for-sporadic-mdi-error-on-meteor-l.patch b/queue-6.6/e1000e-workaround-for-sporadic-mdi-error-on-meteor-l.patch
new file mode 100644 (file)
index 0000000..f497b1d
--- /dev/null
@@ -0,0 +1,404 @@
+From e4d37a59973992e085fd0f2453b8845ce2f9a98d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 4 Jan 2024 16:16:52 +0200
+Subject: e1000e: Workaround for sporadic MDI error on Meteor Lake systems
+
+From: Vitaly Lifshits <vitaly.lifshits@intel.com>
+
+[ Upstream commit 6dbdd4de0362c37e54e8b049781402e5a409e7d0 ]
+
+On some Meteor Lake systems accessing the PHY via the MDIO interface may
+result in an MDI error. This issue happens sporadically and in most cases
+a second access to the PHY via the MDIO interface results in success.
+
+As a workaround, introduce a retry counter which is set to 3 on Meteor
+Lake systems. The driver will only return an error if 3 consecutive PHY
+access attempts fail. The retry mechanism is disabled in specific flows,
+where MDI errors are expected.
+
+Fixes: cc23f4f0b6b9 ("e1000e: Add support for Meteor Lake")
+Suggested-by: Nikolay Mushayev <nikolay.mushayev@intel.com>
+Co-developed-by: Nir Efrati <nir.efrati@intel.com>
+Signed-off-by: Nir Efrati <nir.efrati@intel.com>
+Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
+Tested-by: Naama Meir <naamax.meir@linux.intel.com>
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/e1000e/hw.h      |   2 +
+ drivers/net/ethernet/intel/e1000e/ich8lan.c |  33 ++++
+ drivers/net/ethernet/intel/e1000e/phy.c     | 182 ++++++++++++--------
+ drivers/net/ethernet/intel/e1000e/phy.h     |   2 +
+ 4 files changed, 150 insertions(+), 69 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
+index 1fef6bb5a5fbc..4b6e7536170ab 100644
+--- a/drivers/net/ethernet/intel/e1000e/hw.h
++++ b/drivers/net/ethernet/intel/e1000e/hw.h
+@@ -628,6 +628,7 @@ struct e1000_phy_info {
+       u32 id;
+       u32 reset_delay_us;     /* in usec */
+       u32 revision;
++      u32 retry_count;
+       enum e1000_media_type media_type;
+@@ -644,6 +645,7 @@ struct e1000_phy_info {
+       bool polarity_correction;
+       bool speed_downgraded;
+       bool autoneg_wait_to_complete;
++      bool retry_enabled;
+ };
+ struct e1000_nvm_info {
+diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
+index a2788fd5f8bb8..717c52913e84b 100644
+--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
++++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
+@@ -222,11 +222,18 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)
+       if (hw->mac.type >= e1000_pch_lpt) {
+               /* Only unforce SMBus if ME is not active */
+               if (!(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) {
++                      /* Switching PHY interface always returns MDI error
++                       * so disable retry mechanism to avoid wasting time
++                       */
++                      e1000e_disable_phy_retry(hw);
++
+                       /* Unforce SMBus mode in PHY */
+                       e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg);
+                       phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;
+                       e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg);
++                      e1000e_enable_phy_retry(hw);
++
+                       /* Unforce SMBus mode in MAC */
+                       mac_reg = er32(CTRL_EXT);
+                       mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
+@@ -310,6 +317,11 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
+               goto out;
+       }
++      /* There is no guarantee that the PHY is accessible at this time
++       * so disable retry mechanism to avoid wasting time
++       */
++      e1000e_disable_phy_retry(hw);
++
+       /* The MAC-PHY interconnect may be in SMBus mode.  If the PHY is
+        * inaccessible and resetting the PHY is not blocked, toggle the
+        * LANPHYPC Value bit to force the interconnect to PCIe mode.
+@@ -380,6 +392,8 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
+               break;
+       }
++      e1000e_enable_phy_retry(hw);
++
+       hw->phy.ops.release(hw);
+       if (!ret_val) {
+@@ -449,6 +463,11 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
+       phy->id = e1000_phy_unknown;
++      if (hw->mac.type == e1000_pch_mtp) {
++              phy->retry_count = 2;
++              e1000e_enable_phy_retry(hw);
++      }
++
+       ret_val = e1000_init_phy_workarounds_pchlan(hw);
+       if (ret_val)
+               return ret_val;
+@@ -1146,6 +1165,11 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
+       if (ret_val)
+               goto out;
++      /* Switching PHY interface always returns MDI error
++       * so disable retry mechanism to avoid wasting time
++       */
++      e1000e_disable_phy_retry(hw);
++
+       /* Force SMBus mode in PHY */
+       ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);
+       if (ret_val)
+@@ -1153,6 +1177,8 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
+       phy_reg |= CV_SMB_CTRL_FORCE_SMBUS;
+       e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);
++      e1000e_enable_phy_retry(hw);
++
+       /* Force SMBus mode in MAC */
+       mac_reg = er32(CTRL_EXT);
+       mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;
+@@ -1313,6 +1339,11 @@ static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
+               /* Toggle LANPHYPC Value bit */
+               e1000_toggle_lanphypc_pch_lpt(hw);
++      /* Switching PHY interface always returns MDI error
++       * so disable retry mechanism to avoid wasting time
++       */
++      e1000e_disable_phy_retry(hw);
++
+       /* Unforce SMBus mode in PHY */
+       ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);
+       if (ret_val) {
+@@ -1333,6 +1364,8 @@ static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
+       phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;
+       e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);
++      e1000e_enable_phy_retry(hw);
++
+       /* Unforce SMBus mode in MAC */
+       mac_reg = er32(CTRL_EXT);
+       mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
+diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
+index 96ff0ca561b6c..395746bcf8f7c 100644
+--- a/drivers/net/ethernet/intel/e1000e/phy.c
++++ b/drivers/net/ethernet/intel/e1000e/phy.c
+@@ -107,6 +107,16 @@ s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
+       return e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0);
+ }
++void e1000e_disable_phy_retry(struct e1000_hw *hw)
++{
++      hw->phy.retry_enabled = false;
++}
++
++void e1000e_enable_phy_retry(struct e1000_hw *hw)
++{
++      hw->phy.retry_enabled = true;
++}
++
+ /**
+  *  e1000e_read_phy_reg_mdic - Read MDI control register
+  *  @hw: pointer to the HW structure
+@@ -118,55 +128,73 @@ s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
+  **/
+ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+ {
++      u32 i, mdic = 0, retry_counter, retry_max;
+       struct e1000_phy_info *phy = &hw->phy;
+-      u32 i, mdic = 0;
++      bool success;
+       if (offset > MAX_PHY_REG_ADDRESS) {
+               e_dbg("PHY Address %d is out of range\n", offset);
+               return -E1000_ERR_PARAM;
+       }
++      retry_max = phy->retry_enabled ? phy->retry_count : 0;
++
+       /* Set up Op-code, Phy Address, and register offset in the MDI
+        * Control register.  The MAC will take care of interfacing with the
+        * PHY to retrieve the desired data.
+        */
+-      mdic = ((offset << E1000_MDIC_REG_SHIFT) |
+-              (phy->addr << E1000_MDIC_PHY_SHIFT) |
+-              (E1000_MDIC_OP_READ));
++      for (retry_counter = 0; retry_counter <= retry_max; retry_counter++) {
++              success = true;
+-      ew32(MDIC, mdic);
++              mdic = ((offset << E1000_MDIC_REG_SHIFT) |
++                      (phy->addr << E1000_MDIC_PHY_SHIFT) |
++                      (E1000_MDIC_OP_READ));
+-      /* Poll the ready bit to see if the MDI read completed
+-       * Increasing the time out as testing showed failures with
+-       * the lower time out
+-       */
+-      for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+-              udelay(50);
+-              mdic = er32(MDIC);
+-              if (mdic & E1000_MDIC_READY)
+-                      break;
+-      }
+-      if (!(mdic & E1000_MDIC_READY)) {
+-              e_dbg("MDI Read PHY Reg Address %d did not complete\n", offset);
+-              return -E1000_ERR_PHY;
+-      }
+-      if (mdic & E1000_MDIC_ERROR) {
+-              e_dbg("MDI Read PHY Reg Address %d Error\n", offset);
+-              return -E1000_ERR_PHY;
+-      }
+-      if (FIELD_GET(E1000_MDIC_REG_MASK, mdic) != offset) {
+-              e_dbg("MDI Read offset error - requested %d, returned %d\n",
+-                    offset, FIELD_GET(E1000_MDIC_REG_MASK, mdic));
+-              return -E1000_ERR_PHY;
++              ew32(MDIC, mdic);
++
++              /* Poll the ready bit to see if the MDI read completed
++               * Increasing the time out as testing showed failures with
++               * the lower time out
++               */
++              for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
++                      usleep_range(50, 60);
++                      mdic = er32(MDIC);
++                      if (mdic & E1000_MDIC_READY)
++                              break;
++              }
++              if (!(mdic & E1000_MDIC_READY)) {
++                      e_dbg("MDI Read PHY Reg Address %d did not complete\n",
++                            offset);
++                      success = false;
++              }
++              if (mdic & E1000_MDIC_ERROR) {
++                      e_dbg("MDI Read PHY Reg Address %d Error\n", offset);
++                      success = false;
++              }
++              if (FIELD_GET(E1000_MDIC_REG_MASK, mdic) != offset) {
++                      e_dbg("MDI Read offset error - requested %d, returned %d\n",
++                            offset, FIELD_GET(E1000_MDIC_REG_MASK, mdic));
++                      success = false;
++              }
++
++              /* Allow some time after each MDIC transaction to avoid
++               * reading duplicate data in the next MDIC transaction.
++               */
++              if (hw->mac.type == e1000_pch2lan)
++                      usleep_range(100, 150);
++
++              if (success) {
++                      *data = (u16)mdic;
++                      return 0;
++              }
++
++              if (retry_counter != retry_max) {
++                      e_dbg("Perform retry on PHY transaction...\n");
++                      mdelay(10);
++              }
+       }
+-      *data = (u16)mdic;
+-      /* Allow some time after each MDIC transaction to avoid
+-       * reading duplicate data in the next MDIC transaction.
+-       */
+-      if (hw->mac.type == e1000_pch2lan)
+-              udelay(100);
+-      return 0;
++      return -E1000_ERR_PHY;
+ }
+ /**
+@@ -179,56 +207,72 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+  **/
+ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
+ {
++      u32 i, mdic = 0, retry_counter, retry_max;
+       struct e1000_phy_info *phy = &hw->phy;
+-      u32 i, mdic = 0;
++      bool success;
+       if (offset > MAX_PHY_REG_ADDRESS) {
+               e_dbg("PHY Address %d is out of range\n", offset);
+               return -E1000_ERR_PARAM;
+       }
++      retry_max = phy->retry_enabled ? phy->retry_count : 0;
++
+       /* Set up Op-code, Phy Address, and register offset in the MDI
+        * Control register.  The MAC will take care of interfacing with the
+        * PHY to retrieve the desired data.
+        */
+-      mdic = (((u32)data) |
+-              (offset << E1000_MDIC_REG_SHIFT) |
+-              (phy->addr << E1000_MDIC_PHY_SHIFT) |
+-              (E1000_MDIC_OP_WRITE));
++      for (retry_counter = 0; retry_counter <= retry_max; retry_counter++) {
++              success = true;
+-      ew32(MDIC, mdic);
++              mdic = (((u32)data) |
++                      (offset << E1000_MDIC_REG_SHIFT) |
++                      (phy->addr << E1000_MDIC_PHY_SHIFT) |
++                      (E1000_MDIC_OP_WRITE));
+-      /* Poll the ready bit to see if the MDI read completed
+-       * Increasing the time out as testing showed failures with
+-       * the lower time out
+-       */
+-      for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+-              udelay(50);
+-              mdic = er32(MDIC);
+-              if (mdic & E1000_MDIC_READY)
+-                      break;
+-      }
+-      if (!(mdic & E1000_MDIC_READY)) {
+-              e_dbg("MDI Write PHY Reg Address %d did not complete\n", offset);
+-              return -E1000_ERR_PHY;
+-      }
+-      if (mdic & E1000_MDIC_ERROR) {
+-              e_dbg("MDI Write PHY Red Address %d Error\n", offset);
+-              return -E1000_ERR_PHY;
+-      }
+-      if (FIELD_GET(E1000_MDIC_REG_MASK, mdic) != offset) {
+-              e_dbg("MDI Write offset error - requested %d, returned %d\n",
+-                    offset, FIELD_GET(E1000_MDIC_REG_MASK, mdic));
+-              return -E1000_ERR_PHY;
+-      }
++              ew32(MDIC, mdic);
+-      /* Allow some time after each MDIC transaction to avoid
+-       * reading duplicate data in the next MDIC transaction.
+-       */
+-      if (hw->mac.type == e1000_pch2lan)
+-              udelay(100);
++              /* Poll the ready bit to see if the MDI read completed
++               * Increasing the time out as testing showed failures with
++               * the lower time out
++               */
++              for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
++                      usleep_range(50, 60);
++                      mdic = er32(MDIC);
++                      if (mdic & E1000_MDIC_READY)
++                              break;
++              }
++              if (!(mdic & E1000_MDIC_READY)) {
++                      e_dbg("MDI Write PHY Reg Address %d did not complete\n",
++                            offset);
++                      success = false;
++              }
++              if (mdic & E1000_MDIC_ERROR) {
++                      e_dbg("MDI Write PHY Reg Address %d Error\n", offset);
++                      success = false;
++              }
++              if (FIELD_GET(E1000_MDIC_REG_MASK, mdic) != offset) {
++                      e_dbg("MDI Write offset error - requested %d, returned %d\n",
++                            offset, FIELD_GET(E1000_MDIC_REG_MASK, mdic));
++                      success = false;
++              }
+-      return 0;
++              /* Allow some time after each MDIC transaction to avoid
++               * reading duplicate data in the next MDIC transaction.
++               */
++              if (hw->mac.type == e1000_pch2lan)
++                      usleep_range(100, 150);
++
++              if (success)
++                      return 0;
++
++              if (retry_counter != retry_max) {
++                      e_dbg("Perform retry on PHY transaction...\n");
++                      mdelay(10);
++              }
++      }
++
++      return -E1000_ERR_PHY;
+ }
+ /**
+diff --git a/drivers/net/ethernet/intel/e1000e/phy.h b/drivers/net/ethernet/intel/e1000e/phy.h
+index c48777d095235..049bb325b4b14 100644
+--- a/drivers/net/ethernet/intel/e1000e/phy.h
++++ b/drivers/net/ethernet/intel/e1000e/phy.h
+@@ -51,6 +51,8 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
+ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
+ void e1000_power_up_phy_copper(struct e1000_hw *hw);
+ void e1000_power_down_phy_copper(struct e1000_hw *hw);
++void e1000e_disable_phy_retry(struct e1000_hw *hw);
++void e1000e_enable_phy_retry(struct e1000_hw *hw);
+ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
+ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
+ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-enforce-software-interrupt-during-busy-poll-exi.patch b/queue-6.6/i40e-enforce-software-interrupt-during-busy-poll-exi.patch
new file mode 100644 (file)
index 0000000..69e2cf1
--- /dev/null
@@ -0,0 +1,320 @@
+From 0be173a5b3d5ff5e347c7d981627fc71640129ed Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sat, 16 Mar 2024 12:38:29 +0100
+Subject: i40e: Enforce software interrupt during busy-poll exit
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit ea558de7238bb12c3435c47f0631e9d17bf4a09f ]
+
+As for ice bug fixed by commit b7306b42beaf ("ice: manage interrupts
+during poll exit") followed by commit 23be7075b318 ("ice: fix software
+generating extra interrupts") I'm seeing the similar issue also with
+i40e driver.
+
+In certain situation when busy-loop is enabled together with adaptive
+coalescing, the driver occasionally misses that there are outstanding
+descriptors to clean when exiting busy poll.
+
+Try to catch the remaining work by triggering a software interrupt
+when exiting busy poll. No extra interrupts will be generated when
+busy polling is not used.
+
+The issue was found when running sockperf ping-pong tcp test with
+adaptive coalescing and busy poll enabled (50 as value busy_pool
+and busy_read sysctl knobs) and results in huge latency spikes
+with more than 100000us.
+
+The fix is inspired from the ice driver and do the following:
+1) During napi poll exit in case of busy-poll (napo_complete_done()
+   returns false) this is recorded to q_vector that we were in busy
+   loop.
+2) Extends i40e_buildreg_itr() to be able to add an enforced software
+   interrupt into built value
+2) In i40e_update_enable_itr() enforces a software interrupt trigger
+   if we are exiting busy poll to catch any pending clean-ups
+3) Reuses unused 3rd ITR (interrupt throttle) index and set it to
+   20K interrupts per second to limit the number of these sw interrupts.
+
+Test results
+============
+Prior:
+[root@dell-per640-07 net]# sockperf ping-pong -i 10.9.9.1 --tcp -m 1000 --mps=max -t 120
+sockperf: == version #3.10-no.git ==
+sockperf[CLIENT] send on:sockperf: using recvfrom() to block on socket(s)
+
+[ 0] IP = 10.9.9.1        PORT = 11111 # TCP
+sockperf: Warmup stage (sending a few dummy messages)...
+sockperf: Starting test...
+sockperf: Test end (interrupted by timer)
+sockperf: Test ended
+sockperf: [Total Run] RunTime=119.999 sec; Warm up time=400 msec; SentMessages=2438563; ReceivedMessages=2438562
+sockperf: ========= Printing statistics for Server No: 0
+sockperf: [Valid Duration] RunTime=119.549 sec; SentMessages=2429473; ReceivedMessages=2429473
+sockperf: ====> avg-latency=24.571 (std-dev=93.297, mean-ad=4.904, median-ad=1.510, siqr=1.063, cv=3.797, std-error=0.060, 99.0% ci=[24.417, 24.725])
+sockperf: # dropped messages = 0; # duplicated messages = 0; # out-of-order messages = 0
+sockperf: Summary: Latency is 24.571 usec
+sockperf: Total 2429473 observations; each percentile contains 24294.73 observations
+sockperf: ---> <MAX> observation = 103294.331
+sockperf: ---> percentile 99.999 =   45.633
+sockperf: ---> percentile 99.990 =   37.013
+sockperf: ---> percentile 99.900 =   35.910
+sockperf: ---> percentile 99.000 =   33.390
+sockperf: ---> percentile 90.000 =   28.626
+sockperf: ---> percentile 75.000 =   27.741
+sockperf: ---> percentile 50.000 =   26.743
+sockperf: ---> percentile 25.000 =   25.614
+sockperf: ---> <MIN> observation =   12.220
+
+After:
+[root@dell-per640-07 net]# sockperf ping-pong -i 10.9.9.1 --tcp -m 1000 --mps=max -t 120
+sockperf: == version #3.10-no.git ==
+sockperf[CLIENT] send on:sockperf: using recvfrom() to block on socket(s)
+
+[ 0] IP = 10.9.9.1        PORT = 11111 # TCP
+sockperf: Warmup stage (sending a few dummy messages)...
+sockperf: Starting test...
+sockperf: Test end (interrupted by timer)
+sockperf: Test ended
+sockperf: [Total Run] RunTime=119.999 sec; Warm up time=400 msec; SentMessages=2400055; ReceivedMessages=2400054
+sockperf: ========= Printing statistics for Server No: 0
+sockperf: [Valid Duration] RunTime=119.549 sec; SentMessages=2391186; ReceivedMessages=2391186
+sockperf: ====> avg-latency=24.965 (std-dev=5.934, mean-ad=4.642, median-ad=1.485, siqr=1.067, cv=0.238, std-error=0.004, 99.0% ci=[24.955, 24.975])
+sockperf: # dropped messages = 0; # duplicated messages = 0; # out-of-order messages = 0
+sockperf: Summary: Latency is 24.965 usec
+sockperf: Total 2391186 observations; each percentile contains 23911.86 observations
+sockperf: ---> <MAX> observation =  195.841
+sockperf: ---> percentile 99.999 =   45.026
+sockperf: ---> percentile 99.990 =   39.009
+sockperf: ---> percentile 99.900 =   35.922
+sockperf: ---> percentile 99.000 =   33.482
+sockperf: ---> percentile 90.000 =   28.902
+sockperf: ---> percentile 75.000 =   27.821
+sockperf: ---> percentile 50.000 =   26.860
+sockperf: ---> percentile 25.000 =   25.685
+sockperf: ---> <MIN> observation =   12.277
+
+Fixes: 0bcd952feec7 ("ethernet/intel: consolidate NAPI and NAPI exit")
+Reported-by: Hugo Ferreira <hferreir@redhat.com>
+Reviewed-by: Michal Schmidt <mschmidt@redhat.com>
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e.h        |  1 +
+ drivers/net/ethernet/intel/i40e/i40e_main.c   |  6 ++
+ .../net/ethernet/intel/i40e/i40e_register.h   |  3 +
+ drivers/net/ethernet/intel/i40e/i40e_txrx.c   | 82 ++++++++++++++-----
+ drivers/net/ethernet/intel/i40e/i40e_txrx.h   |  1 +
+ 5 files changed, 72 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h
+index bc353da3ed41d..3cc0b87def3fa 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e.h
++++ b/drivers/net/ethernet/intel/i40e/i40e.h
+@@ -992,6 +992,7 @@ struct i40e_q_vector {
+       struct rcu_head rcu;    /* to avoid race with update stats on free */
+       char name[I40E_INT_NAME_STR_LEN];
+       bool arm_wb_state;
++      bool in_busy_poll;
+       int irq_num;            /* IRQ assigned to this q_vector */
+ } ____cacheline_internodealigned_in_smp;
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
+index fd4e86b6b4c1f..8bfecf81d26f6 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
+@@ -3908,6 +3908,12 @@ static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
+                    q_vector->tx.target_itr >> 1);
+               q_vector->tx.current_itr = q_vector->tx.target_itr;
++              /* Set ITR for software interrupts triggered after exiting
++               * busy-loop polling.
++               */
++              wr32(hw, I40E_PFINT_ITRN(I40E_SW_ITR, vector - 1),
++                   I40E_ITR_20K);
++
+               wr32(hw, I40E_PFINT_RATEN(vector - 1),
+                    i40e_intrl_usec_to_reg(vsi->int_rate_limit));
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h
+index 7339003aa17cd..694cb3e45c1ec 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_register.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_register.h
+@@ -328,8 +328,11 @@
+ #define I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT 3
+ #define I40E_PFINT_DYN_CTLN_ITR_INDX_MASK I40E_MASK(0x3, I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT)
+ #define I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT 5
++#define I40E_PFINT_DYN_CTLN_INTERVAL_MASK I40E_MASK(0xFFF, I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT)
+ #define I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_SHIFT 24
+ #define I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK I40E_MASK(0x1, I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_SHIFT)
++#define I40E_PFINT_DYN_CTLN_SW_ITR_INDX_SHIFT 25
++#define I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK I40E_MASK(0x3, I40E_PFINT_DYN_CTLN_SW_ITR_INDX_SHIFT)
+ #define I40E_PFINT_ICR0 0x00038780 /* Reset: CORER */
+ #define I40E_PFINT_ICR0_INTEVENT_SHIFT 0
+ #define I40E_PFINT_ICR0_INTEVENT_MASK I40E_MASK(0x1, I40E_PFINT_ICR0_INTEVENT_SHIFT)
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+index 1df2f93388128..f703646622d9a 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+@@ -2644,7 +2644,22 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
+       return failure ? budget : (int)total_rx_packets;
+ }
+-static inline u32 i40e_buildreg_itr(const int type, u16 itr)
++/**
++ * i40e_buildreg_itr - build a value for writing to I40E_PFINT_DYN_CTLN register
++ * @itr_idx: interrupt throttling index
++ * @interval: interrupt throttling interval value in usecs
++ * @force_swint: force software interrupt
++ *
++ * The function builds a value for I40E_PFINT_DYN_CTLN register that
++ * is used to update interrupt throttling interval for specified ITR index
++ * and optionally enforces a software interrupt. If the @itr_idx is equal
++ * to I40E_ITR_NONE then no interval change is applied and only @force_swint
++ * parameter is taken into account. If the interval change and enforced
++ * software interrupt are not requested then the built value just enables
++ * appropriate vector interrupt.
++ **/
++static u32 i40e_buildreg_itr(enum i40e_dyn_idx itr_idx, u16 interval,
++                           bool force_swint)
+ {
+       u32 val;
+@@ -2658,23 +2673,33 @@ static inline u32 i40e_buildreg_itr(const int type, u16 itr)
+        * an event in the PBA anyway so we need to rely on the automask
+        * to hold pending events for us until the interrupt is re-enabled
+        *
+-       * The itr value is reported in microseconds, and the register
+-       * value is recorded in 2 microsecond units. For this reason we
+-       * only need to shift by the interval shift - 1 instead of the
+-       * full value.
++       * We have to shift the given value as it is reported in microseconds
++       * and the register value is recorded in 2 microsecond units.
+        */
+-      itr &= I40E_ITR_MASK;
++      interval >>= 1;
++      /* 1. Enable vector interrupt
++       * 2. Update the interval for the specified ITR index
++       *    (I40E_ITR_NONE in the register is used to indicate that
++       *     no interval update is requested)
++       */
+       val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
+-            (type << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
+-            (itr << (I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT - 1));
++            FIELD_PREP(I40E_PFINT_DYN_CTLN_ITR_INDX_MASK, itr_idx) |
++            FIELD_PREP(I40E_PFINT_DYN_CTLN_INTERVAL_MASK, interval);
++
++      /* 3. Enforce software interrupt trigger if requested
++       *    (These software interrupts rate is limited by ITR2 that is
++       *     set to 20K interrupts per second)
++       */
++      if (force_swint)
++              val |= I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
++                     I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
++                     FIELD_PREP(I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK,
++                                I40E_SW_ITR);
+       return val;
+ }
+-/* a small macro to shorten up some long lines */
+-#define INTREG I40E_PFINT_DYN_CTLN
+-
+ /* The act of updating the ITR will cause it to immediately trigger. In order
+  * to prevent this from throwing off adaptive update statistics we defer the
+  * update so that it can only happen so often. So after either Tx or Rx are
+@@ -2693,8 +2718,10 @@ static inline u32 i40e_buildreg_itr(const int type, u16 itr)
+ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
+                                         struct i40e_q_vector *q_vector)
+ {
++      enum i40e_dyn_idx itr_idx = I40E_ITR_NONE;
+       struct i40e_hw *hw = &vsi->back->hw;
+-      u32 intval;
++      u16 interval = 0;
++      u32 itr_val;
+       /* If we don't have MSIX, then we only need to re-enable icr0 */
+       if (!(vsi->back->flags & I40E_FLAG_MSIX_ENABLED)) {
+@@ -2716,8 +2743,8 @@ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
+        */
+       if (q_vector->rx.target_itr < q_vector->rx.current_itr) {
+               /* Rx ITR needs to be reduced, this is highest priority */
+-              intval = i40e_buildreg_itr(I40E_RX_ITR,
+-                                         q_vector->rx.target_itr);
++              itr_idx = I40E_RX_ITR;
++              interval = q_vector->rx.target_itr;
+               q_vector->rx.current_itr = q_vector->rx.target_itr;
+               q_vector->itr_countdown = ITR_COUNTDOWN_START;
+       } else if ((q_vector->tx.target_itr < q_vector->tx.current_itr) ||
+@@ -2726,25 +2753,36 @@ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
+               /* Tx ITR needs to be reduced, this is second priority
+                * Tx ITR needs to be increased more than Rx, fourth priority
+                */
+-              intval = i40e_buildreg_itr(I40E_TX_ITR,
+-                                         q_vector->tx.target_itr);
++              itr_idx = I40E_TX_ITR;
++              interval = q_vector->tx.target_itr;
+               q_vector->tx.current_itr = q_vector->tx.target_itr;
+               q_vector->itr_countdown = ITR_COUNTDOWN_START;
+       } else if (q_vector->rx.current_itr != q_vector->rx.target_itr) {
+               /* Rx ITR needs to be increased, third priority */
+-              intval = i40e_buildreg_itr(I40E_RX_ITR,
+-                                         q_vector->rx.target_itr);
++              itr_idx = I40E_RX_ITR;
++              interval = q_vector->rx.target_itr;
+               q_vector->rx.current_itr = q_vector->rx.target_itr;
+               q_vector->itr_countdown = ITR_COUNTDOWN_START;
+       } else {
+               /* No ITR update, lowest priority */
+-              intval = i40e_buildreg_itr(I40E_ITR_NONE, 0);
+               if (q_vector->itr_countdown)
+                       q_vector->itr_countdown--;
+       }
+-      if (!test_bit(__I40E_VSI_DOWN, vsi->state))
+-              wr32(hw, INTREG(q_vector->reg_idx), intval);
++      /* Do not update interrupt control register if VSI is down */
++      if (test_bit(__I40E_VSI_DOWN, vsi->state))
++              return;
++
++      /* Update ITR interval if necessary and enforce software interrupt
++       * if we are exiting busy poll.
++       */
++      if (q_vector->in_busy_poll) {
++              itr_val = i40e_buildreg_itr(itr_idx, interval, true);
++              q_vector->in_busy_poll = false;
++      } else {
++              itr_val = i40e_buildreg_itr(itr_idx, interval, false);
++      }
++      wr32(hw, I40E_PFINT_DYN_CTLN(q_vector->reg_idx), itr_val);
+ }
+ /**
+@@ -2859,6 +2897,8 @@ int i40e_napi_poll(struct napi_struct *napi, int budget)
+        */
+       if (likely(napi_complete_done(napi, work_done)))
+               i40e_update_enable_itr(vsi, q_vector);
++      else
++              q_vector->in_busy_poll = true;
+       return min(work_done, budget - 1);
+ }
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+index 84e4dacde6f58..81f6a991bfb73 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+@@ -67,6 +67,7 @@ enum i40e_dyn_idx {
+ /* these are indexes into ITRN registers */
+ #define I40E_RX_ITR    I40E_IDX_ITR0
+ #define I40E_TX_ITR    I40E_IDX_ITR1
++#define I40E_SW_ITR    I40E_IDX_ITR2
+ /* Supported RSS offloads */
+ #define I40E_DEFAULT_RSS_HENA ( \
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-move-memory-allocation-structures-to-i40e_alloc.patch b/queue-6.6/i40e-move-memory-allocation-structures-to-i40e_alloc.patch
new file mode 100644 (file)
index 0000000..8908a11
--- /dev/null
@@ -0,0 +1,92 @@
+From 009f4bbd248ed1e348f220e159ca859288a8a5a7 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:32 +0200
+Subject: i40e: Move memory allocation structures to i40e_alloc.h
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit ef5d54078d451973f90e123fafa23fc95c2a08ae ]
+
+Structures i40e_dma_mem & i40e_virt_mem are defined i40e_osdep.h while
+memory allocation functions that use them are declared in i40e_alloc.h
+Move them there.
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e_adminq.h |  1 +
+ drivers/net/ethernet/intel/i40e/i40e_alloc.h  | 14 ++++++++++++++
+ drivers/net/ethernet/intel/i40e/i40e_osdep.h  | 12 ------------
+ 3 files changed, 15 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.h b/drivers/net/ethernet/intel/i40e/i40e_adminq.h
+index 267f2e0a21ce8..1c3d2bc5c3f79 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.h
+@@ -4,6 +4,7 @@
+ #ifndef _I40E_ADMINQ_H_
+ #define _I40E_ADMINQ_H_
++#include "i40e_alloc.h"
+ #include "i40e_osdep.h"
+ #include "i40e_adminq_cmd.h"
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_alloc.h b/drivers/net/ethernet/intel/i40e/i40e_alloc.h
+index 4b2d8da048c64..e0dde326255d6 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_alloc.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_alloc.h
+@@ -4,8 +4,22 @@
+ #ifndef _I40E_ALLOC_H_
+ #define _I40E_ALLOC_H_
++#include <linux/types.h>
++
+ struct i40e_hw;
++/* memory allocation tracking */
++struct i40e_dma_mem {
++      void *va;
++      dma_addr_t pa;
++      u32 size;
++};
++
++struct i40e_virt_mem {
++      void *va;
++      u32 size;
++};
++
+ /* prototype for functions used for dynamic memory allocation */
+ int i40e_allocate_dma_mem(struct i40e_hw *hw,
+                         struct i40e_dma_mem *mem,
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_osdep.h b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+index 70cac3bb31ec3..fd18895cfb56b 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_osdep.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+@@ -29,18 +29,6 @@ struct device *i40e_hw_to_dev(struct i40e_hw *hw);
+ #define rd64(a, reg)          readq((a)->hw_addr + (reg))
+ #define i40e_flush(a)         readl((a)->hw_addr + I40E_GLGEN_STAT)
+-/* memory allocation tracking */
+-struct i40e_dma_mem {
+-      void *va;
+-      dma_addr_t pa;
+-      u32 size;
+-};
+-
+-struct i40e_virt_mem {
+-      void *va;
+-      u32 size;
+-};
+-
+ #define i40e_debug(h, m, s, ...)                              \
+ do {                                                          \
+       if (((m) & (h)->debug_mask))                            \
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-refactor-i40e_mdio_clause-macros.patch b/queue-6.6/i40e-refactor-i40e_mdio_clause-macros.patch
new file mode 100644 (file)
index 0000000..fb248c1
--- /dev/null
@@ -0,0 +1,80 @@
+From 979a24b8c87fc578e4d9b22c2b12a73995c10645 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:29 +0200
+Subject: i40e: Refactor I40E_MDIO_CLAUSE* macros
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit 8196b5fd6c7312d31775f77c7fff0253eb0ecdaa ]
+
+The macros I40E_MDIO_CLAUSE22* and I40E_MDIO_CLAUSE45* are using I40E_MASK
+together with the same values I40E_GLGEN_MSCA_STCODE_SHIFT and
+I40E_GLGEN_MSCA_OPCODE_SHIFT to define masks.
+Introduce I40E_GLGEN_MSCA_OPCODE_MASK and I40E_GLGEN_MSCA_STCODE_MASK
+for both shifts in i40e_register.h and use them to refactor the macros
+mentioned above.
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ .../net/ethernet/intel/i40e/i40e_register.h   |  2 ++
+ drivers/net/ethernet/intel/i40e/i40e_type.h   | 23 +++++++------------
+ 2 files changed, 10 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h
+index 694cb3e45c1ec..989c186824733 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_register.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_register.h
+@@ -202,7 +202,9 @@
+ #define I40E_GLGEN_MSCA_DEVADD_SHIFT 16
+ #define I40E_GLGEN_MSCA_PHYADD_SHIFT 21
+ #define I40E_GLGEN_MSCA_OPCODE_SHIFT 26
++#define I40E_GLGEN_MSCA_OPCODE_MASK(_i) I40E_MASK(_i, I40E_GLGEN_MSCA_OPCODE_SHIFT)
+ #define I40E_GLGEN_MSCA_STCODE_SHIFT 28
++#define I40E_GLGEN_MSCA_STCODE_MASK I40E_MASK(0x1, I40E_GLGEN_MSCA_STCODE_SHIFT)
+ #define I40E_GLGEN_MSCA_MDICMD_SHIFT 30
+ #define I40E_GLGEN_MSCA_MDICMD_MASK I40E_MASK(0x1, I40E_GLGEN_MSCA_MDICMD_SHIFT)
+ #define I40E_GLGEN_MSCA_MDIINPROGEN_SHIFT 31
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h
+index 658bc89132783..d4c6afe84fdd2 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_type.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
+@@ -70,21 +70,14 @@ enum i40e_debug_mask {
+       I40E_DEBUG_ALL                  = 0xFFFFFFFF
+ };
+-#define I40E_MDIO_CLAUSE22_STCODE_MASK        I40E_MASK(1, \
+-                                                I40E_GLGEN_MSCA_STCODE_SHIFT)
+-#define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK  I40E_MASK(1, \
+-                                                I40E_GLGEN_MSCA_OPCODE_SHIFT)
+-#define I40E_MDIO_CLAUSE22_OPCODE_READ_MASK   I40E_MASK(2, \
+-                                                I40E_GLGEN_MSCA_OPCODE_SHIFT)
+-
+-#define I40E_MDIO_CLAUSE45_STCODE_MASK        I40E_MASK(0, \
+-                                                I40E_GLGEN_MSCA_STCODE_SHIFT)
+-#define I40E_MDIO_CLAUSE45_OPCODE_ADDRESS_MASK        I40E_MASK(0, \
+-                                                I40E_GLGEN_MSCA_OPCODE_SHIFT)
+-#define I40E_MDIO_CLAUSE45_OPCODE_WRITE_MASK  I40E_MASK(1, \
+-                                                I40E_GLGEN_MSCA_OPCODE_SHIFT)
+-#define I40E_MDIO_CLAUSE45_OPCODE_READ_MASK   I40E_MASK(3, \
+-                                              I40E_GLGEN_MSCA_OPCODE_SHIFT)
++#define I40E_MDIO_CLAUSE22_STCODE_MASK                I40E_GLGEN_MSCA_STCODE_MASK
++#define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK  I40E_GLGEN_MSCA_OPCODE_MASK(1)
++#define I40E_MDIO_CLAUSE22_OPCODE_READ_MASK   I40E_GLGEN_MSCA_OPCODE_MASK(2)
++
++#define I40E_MDIO_CLAUSE45_STCODE_MASK                I40E_GLGEN_MSCA_STCODE_MASK
++#define I40E_MDIO_CLAUSE45_OPCODE_ADDRESS_MASK        I40E_GLGEN_MSCA_OPCODE_MASK(0)
++#define I40E_MDIO_CLAUSE45_OPCODE_WRITE_MASK  I40E_GLGEN_MSCA_OPCODE_MASK(1)
++#define I40E_MDIO_CLAUSE45_OPCODE_READ_MASK   I40E_GLGEN_MSCA_OPCODE_MASK(3)
+ #define I40E_PHY_COM_REG_PAGE                   0x1E
+ #define I40E_PHY_LED_LINK_MODE_MASK             0xF0
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-remove-_t-suffix-from-enum-type-names.patch b/queue-6.6/i40e-remove-_t-suffix-from-enum-type-names.patch
new file mode 100644 (file)
index 0000000..5fcf8c5
--- /dev/null
@@ -0,0 +1,105 @@
+From e19cafc82b790ad7484491bab57128e100dfdc91 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 13 Nov 2023 15:10:24 -0800
+Subject: i40e: Remove _t suffix from enum type names
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit addca9175e5f74cf29e8ad918c38c09b8663b5b8 ]
+
+Enum type names should not be suffixed by '_t'. Either to use
+'typedef enum name name_t' to so plain 'name_t var' instead of
+'enum name_t var'.
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Link: https://lore.kernel.org/r/20231113231047.548659-6-anthony.l.nguyen@intel.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+Stable-dep-of: ea558de7238b ("i40e: Enforce software interrupt during busy-poll exit")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e.h      | 4 ++--
+ drivers/net/ethernet/intel/i40e/i40e_ptp.c  | 6 +++---
+ drivers/net/ethernet/intel/i40e/i40e_txrx.h | 4 ++--
+ 3 files changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h
+index 55bb0b5310d5b..bc353da3ed41d 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e.h
++++ b/drivers/net/ethernet/intel/i40e/i40e.h
+@@ -108,7 +108,7 @@
+ #define I40E_MAX_BW_INACTIVE_ACCUM    4 /* accumulate 4 credits max */
+ /* driver state flags */
+-enum i40e_state_t {
++enum i40e_state {
+       __I40E_TESTING,
+       __I40E_CONFIG_BUSY,
+       __I40E_CONFIG_DONE,
+@@ -156,7 +156,7 @@ enum i40e_state_t {
+       BIT_ULL(__I40E_PF_RESET_AND_REBUILD_REQUESTED)
+ /* VSI state flags */
+-enum i40e_vsi_state_t {
++enum i40e_vsi_state {
+       __I40E_VSI_DOWN,
+       __I40E_VSI_NEEDS_RESTART,
+       __I40E_VSI_SYNCING_FILTERS,
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+index 8a26811140b47..cac9584debb1d 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+@@ -34,7 +34,7 @@ enum i40e_ptp_pin {
+       GPIO_4
+ };
+-enum i40e_can_set_pins_t {
++enum i40e_can_set_pins {
+       CANT_DO_PINS = -1,
+       CAN_SET_PINS,
+       CAN_DO_PINS
+@@ -192,7 +192,7 @@ static bool i40e_is_ptp_pin_dev(struct i40e_hw *hw)
+  * return CAN_DO_PINS if pins can be manipulated within a NIC or
+  * return CANT_DO_PINS otherwise.
+  **/
+-static enum i40e_can_set_pins_t i40e_can_set_pins(struct i40e_pf *pf)
++static enum i40e_can_set_pins i40e_can_set_pins(struct i40e_pf *pf)
+ {
+       if (!i40e_is_ptp_pin_dev(&pf->hw)) {
+               dev_warn(&pf->pdev->dev,
+@@ -1070,7 +1070,7 @@ static void i40e_ptp_set_pins_hw(struct i40e_pf *pf)
+ static int i40e_ptp_set_pins(struct i40e_pf *pf,
+                            struct i40e_ptp_pins_settings *pins)
+ {
+-      enum i40e_can_set_pins_t pin_caps = i40e_can_set_pins(pf);
++      enum i40e_can_set_pins pin_caps = i40e_can_set_pins(pf);
+       int i = 0;
+       if (pin_caps == CANT_DO_PINS)
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+index 900b0d9ede9f5..84e4dacde6f58 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+@@ -57,7 +57,7 @@ static inline u16 i40e_intrl_usec_to_reg(int intrl)
+  * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any
+  * register but instead is a special value meaning "don't update" ITR0/1/2.
+  */
+-enum i40e_dyn_idx_t {
++enum i40e_dyn_idx {
+       I40E_IDX_ITR0 = 0,
+       I40E_IDX_ITR1 = 1,
+       I40E_IDX_ITR2 = 2,
+@@ -305,7 +305,7 @@ struct i40e_rx_queue_stats {
+       u64 page_busy_count;
+ };
+-enum i40e_ring_state_t {
++enum i40e_ring_state {
+       __I40E_TX_FDIR_INIT_DONE,
+       __I40E_TX_XPS_INIT_DONE,
+       __I40E_RING_STATE_NBITS /* must be last */
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-remove-back-pointer-from-i40e_hw-structure.patch b/queue-6.6/i40e-remove-back-pointer-from-i40e_hw-structure.patch
new file mode 100644 (file)
index 0000000..1e6d95c
--- /dev/null
@@ -0,0 +1,146 @@
+From b5a0ff49504db5ebc55dcdfd53576741ad1ffb32 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:27 +0200
+Subject: i40e: Remove back pointer from i40e_hw structure
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit 39ec612acf6d075809c38a7262d7ad09314762f3 ]
+
+The .back field placed in i40e_hw is used to get pointer to i40e_pf
+instance but it is not necessary as the i40e_hw is a part of i40e_pf
+and containerof macro can be used to obtain the pointer to i40e_pf.
+Remove .back field from i40e_hw structure, introduce i40e_hw_to_pf()
+and i40e_hw_to_dev() helpers and use them.
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e.h       | 11 ++++++++++
+ drivers/net/ethernet/intel/i40e/i40e_main.c  | 22 ++++++++++++++------
+ drivers/net/ethernet/intel/i40e/i40e_osdep.h |  8 +++----
+ drivers/net/ethernet/intel/i40e/i40e_type.h  |  1 -
+ 4 files changed, 31 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h
+index 3cc0b87def3fa..6f08c8fe653bd 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e.h
++++ b/drivers/net/ethernet/intel/i40e/i40e.h
+@@ -1322,4 +1322,15 @@ static inline u32 i40e_is_tc_mqprio_enabled(struct i40e_pf *pf)
+       return pf->flags & I40E_FLAG_TC_MQPRIO;
+ }
++/**
++ * i40e_hw_to_pf - get pf pointer from the hardware structure
++ * @hw: pointer to the device HW structure
++ **/
++static inline struct i40e_pf *i40e_hw_to_pf(struct i40e_hw *hw)
++{
++      return container_of(hw, struct i40e_pf, hw);
++}
++
++struct device *i40e_hw_to_dev(struct i40e_hw *hw);
++
+ #endif /* _I40E_H_ */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
+index 8bfecf81d26f6..17ab6a1c53971 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
+@@ -125,6 +125,17 @@ static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
+       }
+ }
++/**
++ * i40e_hw_to_dev - get device pointer from the hardware structure
++ * @hw: pointer to the device HW structure
++ **/
++struct device *i40e_hw_to_dev(struct i40e_hw *hw)
++{
++      struct i40e_pf *pf = i40e_hw_to_pf(hw);
++
++      return &pf->pdev->dev;
++}
++
+ /**
+  * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
+  * @hw:   pointer to the HW structure
+@@ -135,7 +146,7 @@ static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
+ int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
+                           u64 size, u32 alignment)
+ {
+-      struct i40e_pf *pf = (struct i40e_pf *)hw->back;
++      struct i40e_pf *pf = i40e_hw_to_pf(hw);
+       mem->size = ALIGN(size, alignment);
+       mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
+@@ -153,7 +164,7 @@ int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
+  **/
+ int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
+ {
+-      struct i40e_pf *pf = (struct i40e_pf *)hw->back;
++      struct i40e_pf *pf = i40e_hw_to_pf(hw);
+       dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
+       mem->va = NULL;
+@@ -15653,10 +15664,10 @@ static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
+  **/
+ static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
+ {
+-      struct pci_dev *pdev = ((struct i40e_pf *)hw->back)->pdev;
++      struct i40e_pf *pf = i40e_hw_to_pf(hw);
+-      hw->subsystem_device_id = pdev->subsystem_device ?
+-              pdev->subsystem_device :
++      hw->subsystem_device_id = pf->pdev->subsystem_device ?
++              pf->pdev->subsystem_device :
+               (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
+ }
+@@ -15726,7 +15737,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+       set_bit(__I40E_DOWN, pf->state);
+       hw = &pf->hw;
+-      hw->back = pf;
+       pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
+                               I40E_MAX_CSR_SPACE);
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_osdep.h b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+index 2bd4de03dafa2..997569a4ad57b 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_osdep.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+@@ -18,10 +18,10 @@
+  * actual OS primitives
+  */
+-#define hw_dbg(hw, S, A...)                                                   \
+-do {                                                                          \
+-      dev_dbg(&((struct i40e_pf *)hw->back)->pdev->dev, S, ##A);              \
+-} while (0)
++struct i40e_hw;
++struct device *i40e_hw_to_dev(struct i40e_hw *hw);
++
++#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)
+ #define wr32(a, reg, value)   writel((value), ((a)->hw_addr + (reg)))
+ #define rd32(a, reg)          readl((a)->hw_addr + (reg))
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h
+index 232131bedc3e7..658bc89132783 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_type.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
+@@ -525,7 +525,6 @@ struct i40e_dcbx_config {
+ /* Port hardware description */
+ struct i40e_hw {
+       u8 __iomem *hw_addr;
+-      void *back;
+       /* subsystem structs */
+       struct i40e_phy_info phy;
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-remove-circular-header-dependencies-and-fix-hea.patch b/queue-6.6/i40e-remove-circular-header-dependencies-and-fix-hea.patch
new file mode 100644 (file)
index 0000000..9a17dd0
--- /dev/null
@@ -0,0 +1,559 @@
+From 08d61eed0f76d565dd7c8bb18246c6b9b71d4de7 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:34 +0200
+Subject: i40e: Remove circular header dependencies and fix headers
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit 56df345917c09ffc00b7834f88990a7a7c338b5c ]
+
+Similarly as for ice driver [1] there are also circular header
+dependencies in i40e driver:
+i40e.h -> i40e_virtchnl_pf.h -> i40e.h
+
+Another issue is that i40e header files does not contain their own
+dependencies on other header files (both private and standard) so their
+inclusion in .c file require to add these deps in certain order to
+that .c file to make it compilable.
+
+Fix both issues by removal the mentioned circular dependency, by filling
+i40e headers with their dependencies so they can be placed anywhere in
+a source code. Additionally remove bunch of includes from i40e.h super
+header file that are not necessary and include i40e.h only in .c files
+that really require it.
+
+[1] 649c87c6ff52 ("ice: remove circular header dependencies on ice.h")
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e.h        | 43 ++++---------------
+ drivers/net/ethernet/intel/i40e/i40e_adminq.c |  4 +-
+ .../net/ethernet/intel/i40e/i40e_adminq_cmd.h |  2 +
+ drivers/net/ethernet/intel/i40e/i40e_client.c |  1 -
+ drivers/net/ethernet/intel/i40e/i40e_common.c | 11 +++--
+ drivers/net/ethernet/intel/i40e/i40e_dcb.c    |  4 +-
+ drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c |  2 +-
+ drivers/net/ethernet/intel/i40e/i40e_ddp.c    |  2 +-
+ .../net/ethernet/intel/i40e/i40e_debugfs.c    |  3 +-
+ drivers/net/ethernet/intel/i40e/i40e_diag.h   |  5 ++-
+ .../net/ethernet/intel/i40e/i40e_ethtool.c    |  3 +-
+ drivers/net/ethernet/intel/i40e/i40e_hmc.c    |  3 +-
+ drivers/net/ethernet/intel/i40e/i40e_hmc.h    |  4 ++
+ .../net/ethernet/intel/i40e/i40e_lan_hmc.c    |  8 ++--
+ .../net/ethernet/intel/i40e/i40e_lan_hmc.h    |  2 +
+ drivers/net/ethernet/intel/i40e/i40e_main.c   | 15 ++++---
+ drivers/net/ethernet/intel/i40e/i40e_nvm.c    |  2 +
+ .../net/ethernet/intel/i40e/i40e_prototype.h  |  5 +--
+ drivers/net/ethernet/intel/i40e/i40e_ptp.c    |  3 +-
+ drivers/net/ethernet/intel/i40e/i40e_txrx.c   |  7 ++-
+ drivers/net/ethernet/intel/i40e/i40e_txrx.h   |  1 +
+ .../ethernet/intel/i40e/i40e_txrx_common.h    |  2 +
+ drivers/net/ethernet/intel/i40e/i40e_type.h   |  7 +--
+ .../ethernet/intel/i40e/i40e_virtchnl_pf.c    |  2 +
+ .../ethernet/intel/i40e/i40e_virtchnl_pf.h    |  4 +-
+ drivers/net/ethernet/intel/i40e/i40e_xsk.c    |  4 --
+ drivers/net/ethernet/intel/i40e/i40e_xsk.h    |  4 ++
+ 27 files changed, 72 insertions(+), 81 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h
+index 6f08c8fe653bd..3e6839ac1f0f1 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e.h
++++ b/drivers/net/ethernet/intel/i40e/i40e.h
+@@ -4,47 +4,20 @@
+ #ifndef _I40E_H_
+ #define _I40E_H_
+-#include <net/tcp.h>
+-#include <net/udp.h>
+-#include <linux/types.h>
+-#include <linux/errno.h>
+-#include <linux/module.h>
+-#include <linux/pci.h>
+-#include <linux/netdevice.h>
+-#include <linux/ioport.h>
+-#include <linux/iommu.h>
+-#include <linux/slab.h>
+-#include <linux/list.h>
+-#include <linux/hashtable.h>
+-#include <linux/string.h>
+-#include <linux/in.h>
+-#include <linux/ip.h>
+-#include <linux/sctp.h>
+-#include <linux/pkt_sched.h>
+-#include <linux/ipv6.h>
+-#include <net/checksum.h>
+-#include <net/ip6_checksum.h>
+ #include <linux/ethtool.h>
+-#include <linux/if_vlan.h>
+-#include <linux/if_macvlan.h>
+-#include <linux/if_bridge.h>
+-#include <linux/clocksource.h>
+-#include <linux/net_tstamp.h>
++#include <linux/pci.h>
+ #include <linux/ptp_clock_kernel.h>
++#include <linux/types.h>
++#include <linux/avf/virtchnl.h>
++#include <linux/net/intel/i40e_client.h>
+ #include <net/pkt_cls.h>
+-#include <net/pkt_sched.h>
+-#include <net/tc_act/tc_gact.h>
+-#include <net/tc_act/tc_mirred.h>
+ #include <net/udp_tunnel.h>
+-#include <net/xdp_sock.h>
+-#include <linux/bitfield.h>
+-#include "i40e_type.h"
++#include "i40e_dcb.h"
++#include "i40e_debug.h"
++#include "i40e_io.h"
+ #include "i40e_prototype.h"
+-#include <linux/net/intel/i40e_client.h>
+-#include <linux/avf/virtchnl.h>
+-#include "i40e_virtchnl_pf.h"
++#include "i40e_register.h"
+ #include "i40e_txrx.h"
+-#include "i40e_dcb.h"
+ /* Useful i40e defaults */
+ #define I40E_MAX_VEB                  16
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+index e72cfe587c89e..9ce6e633cc2f0 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+@@ -1,9 +1,9 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+-#include "i40e_type.h"
++#include <linux/delay.h>
++#include "i40e_alloc.h"
+ #include "i40e_register.h"
+-#include "i40e_adminq.h"
+ #include "i40e_prototype.h"
+ static void i40e_resume_aq(struct i40e_hw *hw);
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+index 3357d65a906bf..18a1c3b6d72c5 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+@@ -4,6 +4,8 @@
+ #ifndef _I40E_ADMINQ_CMD_H_
+ #define _I40E_ADMINQ_CMD_H_
++#include <linux/bits.h>
++
+ /* This header file defines the i40e Admin Queue commands and is shared between
+  * i40e Firmware and Software.
+  *
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_client.c b/drivers/net/ethernet/intel/i40e/i40e_client.c
+index 639c5a1ca853b..306758428aefd 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_client.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_client.c
+@@ -6,7 +6,6 @@
+ #include <linux/net/intel/i40e_client.h>
+ #include "i40e.h"
+-#include "i40e_prototype.h"
+ static LIST_HEAD(i40e_devices);
+ static DEFINE_MUTEX(i40e_device_mutex);
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
+index 1b493854f5229..e0685219dbde9 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
+@@ -1,11 +1,14 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2021 Intel Corporation. */
+-#include "i40e.h"
+-#include "i40e_type.h"
+-#include "i40e_adminq.h"
+-#include "i40e_prototype.h"
+ #include <linux/avf/virtchnl.h>
++#include <linux/delay.h>
++#include <linux/etherdevice.h>
++#include <linux/pci.h>
++#include "i40e_adminq_cmd.h"
++#include "i40e_devids.h"
++#include "i40e_prototype.h"
++#include "i40e_register.h"
+ /**
+  * i40e_set_mac_type - Sets MAC type
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb.c b/drivers/net/ethernet/intel/i40e/i40e_dcb.c
+index f81e744c0fb36..68602fc375f62 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_dcb.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_dcb.c
+@@ -1,9 +1,9 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2021 Intel Corporation. */
+-#include "i40e_adminq.h"
+-#include "i40e_prototype.h"
++#include "i40e_alloc.h"
+ #include "i40e_dcb.h"
++#include "i40e_prototype.h"
+ /**
+  * i40e_get_dcbx_status
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
+index 195421d863ab1..077a95dad32cf 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
+@@ -2,8 +2,8 @@
+ /* Copyright(c) 2013 - 2021 Intel Corporation. */
+ #ifdef CONFIG_I40E_DCB
+-#include "i40e.h"
+ #include <net/dcbnl.h>
++#include "i40e.h"
+ #define I40E_DCBNL_STATUS_SUCCESS     0
+ #define I40E_DCBNL_STATUS_ERROR               1
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_ddp.c b/drivers/net/ethernet/intel/i40e/i40e_ddp.c
+index 0e72abd178ae3..21b3518c40968 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_ddp.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_ddp.c
+@@ -1,9 +1,9 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
++#include <linux/firmware.h>
+ #include "i40e.h"
+-#include <linux/firmware.h>
+ /**
+  * i40e_ddp_profiles_eq - checks if DDP profiles are the equivalent
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
+index 1a497cb077100..999c9708def53 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
+@@ -5,8 +5,9 @@
+ #include <linux/fs.h>
+ #include <linux/debugfs.h>
+-
++#include <linux/if_bridge.h>
+ #include "i40e.h"
++#include "i40e_virtchnl_pf.h"
+ static struct dentry *i40e_dbg_root;
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_diag.h b/drivers/net/ethernet/intel/i40e/i40e_diag.h
+index c3ce5f35211f0..ece3a6b9a5c61 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_diag.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_diag.h
+@@ -4,7 +4,10 @@
+ #ifndef _I40E_DIAG_H_
+ #define _I40E_DIAG_H_
+-#include "i40e_type.h"
++#include "i40e_adminq_cmd.h"
++
++/* forward-declare the HW struct for the compiler */
++struct i40e_hw;
+ enum i40e_lb_mode {
+       I40E_LB_MODE_NONE       = 0x0,
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
+index bd1321bf7e268..4e90570ba7803 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
+@@ -3,9 +3,10 @@
+ /* ethtool support for i40e */
+-#include "i40e.h"
++#include "i40e_devids.h"
+ #include "i40e_diag.h"
+ #include "i40e_txrx_common.h"
++#include "i40e_virtchnl_pf.h"
+ /* ethtool statistics helpers */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+index b383aea652f3e..1742624ca62ed 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_hmc.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+@@ -1,9 +1,8 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+-#include "i40e.h"
+-#include "i40e_register.h"
+ #include "i40e_alloc.h"
++#include "i40e_debug.h"
+ #include "i40e_hmc.h"
+ #include "i40e_type.h"
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.h b/drivers/net/ethernet/intel/i40e/i40e_hmc.h
+index 9960da07a5732..480e3a883cc7a 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_hmc.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.h
+@@ -4,6 +4,10 @@
+ #ifndef _I40E_HMC_H_
+ #define _I40E_HMC_H_
++#include "i40e_alloc.h"
++#include "i40e_io.h"
++#include "i40e_register.h"
++
+ #define I40E_HMC_MAX_BP_COUNT 512
+ /* forward-declare the HW struct for the compiler */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
+index 830f1de254ef4..beaaf5c309d51 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
+@@ -1,12 +1,10 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+-#include "i40e.h"
+-#include "i40e_register.h"
+-#include "i40e_type.h"
+-#include "i40e_hmc.h"
++#include "i40e_alloc.h"
++#include "i40e_debug.h"
+ #include "i40e_lan_hmc.h"
+-#include "i40e_prototype.h"
++#include "i40e_type.h"
+ /* lan specific interface functions */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h
+index 9f960404c2b37..305a276953b01 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h
+@@ -4,6 +4,8 @@
+ #ifndef _I40E_LAN_HMC_H_
+ #define _I40E_LAN_HMC_H_
++#include "i40e_hmc.h"
++
+ /* forward-declare the HW struct for the compiler */
+ struct i40e_hw;
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
+index 46b7a428808a8..a21fc92aa2725 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
+@@ -1,19 +1,22 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2021 Intel Corporation. */
+-#include <linux/etherdevice.h>
+-#include <linux/of_net.h>
+-#include <linux/pci.h>
+-#include <linux/bpf.h>
+ #include <generated/utsrelease.h>
+ #include <linux/crash_dump.h>
++#include <linux/if_bridge.h>
++#include <linux/if_macvlan.h>
++#include <linux/module.h>
++#include <net/pkt_cls.h>
++#include <net/xdp_sock_drv.h>
+ /* Local includes */
+ #include "i40e.h"
++#include "i40e_devids.h"
+ #include "i40e_diag.h"
++#include "i40e_lan_hmc.h"
++#include "i40e_virtchnl_pf.h"
+ #include "i40e_xsk.h"
+-#include <net/udp_tunnel.h>
+-#include <net/xdp_sock_drv.h>
++
+ /* All i40e tracepoints are defined by the include below, which
+  * must be included exactly once across the whole kernel with
+  * CREATE_TRACE_POINTS defined
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+index 07a46adeab38e..77cdbfc19d477 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+@@ -1,6 +1,8 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
++#include <linux/delay.h>
++#include "i40e_alloc.h"
+ #include "i40e_prototype.h"
+ /**
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
+index 9c9234c0706f0..2001fefa0c52d 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
+@@ -4,10 +4,9 @@
+ #ifndef _I40E_PROTOTYPE_H_
+ #define _I40E_PROTOTYPE_H_
+-#include "i40e_type.h"
+-#include "i40e_alloc.h"
+-#include "i40e_debug.h"
+ #include <linux/avf/virtchnl.h>
++#include "i40e_debug.h"
++#include "i40e_type.h"
+ /* Prototypes for shared code functions that are not in
+  * the standard function pointer structures.  These are
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+index cac9584debb1d..65c714d0bfffd 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+@@ -1,9 +1,10 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+-#include "i40e.h"
+ #include <linux/ptp_classify.h>
+ #include <linux/posix-clock.h>
++#include "i40e.h"
++#include "i40e_devids.h"
+ /* The XL710 timesync is very much like Intel's 82599 design when it comes to
+  * the fundamental clock design. However, the clock operations are much simpler
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+index f703646622d9a..c962987d8b51b 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+@@ -1,14 +1,13 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+-#include <linux/prefetch.h>
+ #include <linux/bpf_trace.h>
++#include <linux/prefetch.h>
++#include <linux/sctp.h>
+ #include <net/mpls.h>
+ #include <net/xdp.h>
+-#include "i40e.h"
+-#include "i40e_trace.h"
+-#include "i40e_prototype.h"
+ #include "i40e_txrx_common.h"
++#include "i40e_trace.h"
+ #include "i40e_xsk.h"
+ #define I40E_TXD_CMD (I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS)
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+index 81f6a991bfb73..2b1d50873a4d1 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+@@ -5,6 +5,7 @@
+ #define _I40E_TXRX_H_
+ #include <net/xdp.h>
++#include "i40e_type.h"
+ /* Interrupt Throttling and Rate Limiting Goodies */
+ #define I40E_DEFAULT_IRQ_WORK      256
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx_common.h b/drivers/net/ethernet/intel/i40e/i40e_txrx_common.h
+index 8c5118c8baafb..e26807fd21232 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx_common.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx_common.h
+@@ -4,6 +4,8 @@
+ #ifndef I40E_TXRX_COMMON_
+ #define I40E_TXRX_COMMON_
++#include "i40e.h"
++
+ int i40e_xmit_xdp_tx_ring(struct xdp_buff *xdp, struct i40e_ring *xdp_ring);
+ void i40e_clean_programming_status(struct i40e_ring *rx_ring, u64 qword0_raw,
+                                  u64 qword1);
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h
+index 44cea0f4f908d..4092f82bcfb12 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_type.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
+@@ -4,14 +4,9 @@
+ #ifndef _I40E_TYPE_H_
+ #define _I40E_TYPE_H_
+-#include <linux/delay.h>
+-#include <linux/if_ether.h>
+-#include "i40e_io.h"
+-#include "i40e_register.h"
++#include <uapi/linux/if_ether.h>
+ #include "i40e_adminq.h"
+ #include "i40e_hmc.h"
+-#include "i40e_lan_hmc.h"
+-#include "i40e_devids.h"
+ /* I40E_MASK is a macro used on 32 bit registers */
+ #define I40E_MASK(mask, shift) ((u32)(mask) << (shift))
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+index 6b90453205b23..7d47a05274548 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+@@ -2,6 +2,8 @@
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+ #include "i40e.h"
++#include "i40e_lan_hmc.h"
++#include "i40e_virtchnl_pf.h"
+ /*********************notification routines***********************/
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
+index cf190762421cc..66f95e2f3146a 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
+@@ -4,7 +4,9 @@
+ #ifndef _I40E_VIRTCHNL_PF_H_
+ #define _I40E_VIRTCHNL_PF_H_
+-#include "i40e.h"
++#include <linux/avf/virtchnl.h>
++#include <linux/netdevice.h>
++#include "i40e_type.h"
+ #define I40E_MAX_VLANID 4095
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_xsk.c b/drivers/net/ethernet/intel/i40e/i40e_xsk.c
+index 1f8ae6f5d9807..65f38a57b3dfe 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_xsk.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_xsk.c
+@@ -2,11 +2,7 @@
+ /* Copyright(c) 2018 Intel Corporation. */
+ #include <linux/bpf_trace.h>
+-#include <linux/stringify.h>
+ #include <net/xdp_sock_drv.h>
+-#include <net/xdp.h>
+-
+-#include "i40e.h"
+ #include "i40e_txrx_common.h"
+ #include "i40e_xsk.h"
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_xsk.h b/drivers/net/ethernet/intel/i40e/i40e_xsk.h
+index 821df248f8bee..ef156fad52f26 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_xsk.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_xsk.h
+@@ -4,6 +4,8 @@
+ #ifndef _I40E_XSK_H_
+ #define _I40E_XSK_H_
++#include <linux/types.h>
++
+ /* This value should match the pragma in the loop_unrolled_for
+  * macro. Why 4? It is strictly empirical. It seems to be a good
+  * compromise between the advantage of having simultaneous outstanding
+@@ -20,7 +22,9 @@
+ #define loop_unrolled_for for
+ #endif
++struct i40e_ring;
+ struct i40e_vsi;
++struct net_device;
+ struct xsk_buff_pool;
+ int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair);
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-simplify-memory-allocation-functions.patch b/queue-6.6/i40e-simplify-memory-allocation-functions.patch
new file mode 100644 (file)
index 0000000..cdd4d4b
--- /dev/null
@@ -0,0 +1,227 @@
+From ac045c80a4f131de492a77109d58eba1a15204f3 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:31 +0200
+Subject: i40e: Simplify memory allocation functions
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit d3276f928a1d2dfebc41a82e967cd0dffeb540f8 ]
+
+Enum i40e_memory_type enum is unused in i40e_allocate_dma_mem() thus
+can be safely removed. Useless macros in i40e_alloc.h can be removed
+as well.
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e_adminq.c |  4 ----
+ drivers/net/ethernet/intel/i40e/i40e_alloc.h  | 14 -------------
+ drivers/net/ethernet/intel/i40e/i40e_hmc.c    | 12 ++++-------
+ drivers/net/ethernet/intel/i40e/i40e_main.c   | 20 +++++++++----------
+ drivers/net/ethernet/intel/i40e/i40e_osdep.h  |  7 -------
+ 5 files changed, 14 insertions(+), 43 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+index 100eb77b8dfe6..e72cfe587c89e 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+@@ -51,7 +51,6 @@ static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)
+       int ret_code;
+       ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,
+-                                       i40e_mem_atq_ring,
+                                        (hw->aq.num_asq_entries *
+                                        sizeof(struct i40e_aq_desc)),
+                                        I40E_ADMINQ_DESC_ALIGNMENT);
+@@ -78,7 +77,6 @@ static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw)
+       int ret_code;
+       ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,
+-                                       i40e_mem_arq_ring,
+                                        (hw->aq.num_arq_entries *
+                                        sizeof(struct i40e_aq_desc)),
+                                        I40E_ADMINQ_DESC_ALIGNMENT);
+@@ -136,7 +134,6 @@ static int i40e_alloc_arq_bufs(struct i40e_hw *hw)
+       for (i = 0; i < hw->aq.num_arq_entries; i++) {
+               bi = &hw->aq.arq.r.arq_bi[i];
+               ret_code = i40e_allocate_dma_mem(hw, bi,
+-                                               i40e_mem_arq_buf,
+                                                hw->aq.arq_buf_size,
+                                                I40E_ADMINQ_DESC_ALIGNMENT);
+               if (ret_code)
+@@ -198,7 +195,6 @@ static int i40e_alloc_asq_bufs(struct i40e_hw *hw)
+       for (i = 0; i < hw->aq.num_asq_entries; i++) {
+               bi = &hw->aq.asq.r.asq_bi[i];
+               ret_code = i40e_allocate_dma_mem(hw, bi,
+-                                               i40e_mem_asq_buf,
+                                                hw->aq.asq_buf_size,
+                                                I40E_ADMINQ_DESC_ALIGNMENT);
+               if (ret_code)
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_alloc.h b/drivers/net/ethernet/intel/i40e/i40e_alloc.h
+index a6c9a9e343d11..4b2d8da048c64 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_alloc.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_alloc.h
+@@ -6,23 +6,9 @@
+ struct i40e_hw;
+-/* Memory allocation types */
+-enum i40e_memory_type {
+-      i40e_mem_arq_buf = 0,           /* ARQ indirect command buffer */
+-      i40e_mem_asq_buf = 1,
+-      i40e_mem_atq_buf = 2,           /* ATQ indirect command buffer */
+-      i40e_mem_arq_ring = 3,          /* ARQ descriptor ring */
+-      i40e_mem_atq_ring = 4,          /* ATQ descriptor ring */
+-      i40e_mem_pd = 5,                /* Page Descriptor */
+-      i40e_mem_bp = 6,                /* Backing Page - 4KB */
+-      i40e_mem_bp_jumbo = 7,          /* Backing Page - > 4KB */
+-      i40e_mem_reserved
+-};
+-
+ /* prototype for functions used for dynamic memory allocation */
+ int i40e_allocate_dma_mem(struct i40e_hw *hw,
+                         struct i40e_dma_mem *mem,
+-                        enum i40e_memory_type type,
+                         u64 size, u32 alignment);
+ int i40e_free_dma_mem(struct i40e_hw *hw,
+                     struct i40e_dma_mem *mem);
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+index 96ee63aca7a10..7451d346ae83f 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_hmc.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+@@ -22,7 +22,6 @@ int i40e_add_sd_table_entry(struct i40e_hw *hw,
+                           enum i40e_sd_entry_type type,
+                           u64 direct_mode_sz)
+ {
+-      enum i40e_memory_type mem_type __attribute__((unused));
+       struct i40e_hmc_sd_entry *sd_entry;
+       bool dma_mem_alloc_done = false;
+       struct i40e_dma_mem mem;
+@@ -43,16 +42,13 @@ int i40e_add_sd_table_entry(struct i40e_hw *hw,
+       sd_entry = &hmc_info->sd_table.sd_entry[sd_index];
+       if (!sd_entry->valid) {
+-              if (I40E_SD_TYPE_PAGED == type) {
+-                      mem_type = i40e_mem_pd;
++              if (type == I40E_SD_TYPE_PAGED)
+                       alloc_len = I40E_HMC_PAGED_BP_SIZE;
+-              } else {
+-                      mem_type = i40e_mem_bp_jumbo;
++              else
+                       alloc_len = direct_mode_sz;
+-              }
+               /* allocate a 4K pd page or 2M backing page */
+-              ret_code = i40e_allocate_dma_mem(hw, &mem, mem_type, alloc_len,
++              ret_code = i40e_allocate_dma_mem(hw, &mem, alloc_len,
+                                                I40E_HMC_PD_BP_BUF_ALIGNMENT);
+               if (ret_code)
+                       goto exit;
+@@ -140,7 +136,7 @@ int i40e_add_pd_table_entry(struct i40e_hw *hw,
+                       page = rsrc_pg;
+               } else {
+                       /* allocate a 4K backing page */
+-                      ret_code = i40e_allocate_dma_mem(hw, page, i40e_mem_bp,
++                      ret_code = i40e_allocate_dma_mem(hw, page,
+                                               I40E_HMC_PAGED_BP_SIZE,
+                                               I40E_HMC_PD_BP_BUF_ALIGNMENT);
+                       if (ret_code)
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
+index 17ab6a1c53971..46b7a428808a8 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
+@@ -137,14 +137,14 @@ struct device *i40e_hw_to_dev(struct i40e_hw *hw)
+ }
+ /**
+- * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
++ * i40e_allocate_dma_mem - OS specific memory alloc for shared code
+  * @hw:   pointer to the HW structure
+  * @mem:  ptr to mem struct to fill out
+  * @size: size of memory requested
+  * @alignment: what to align the allocation to
+  **/
+-int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
+-                          u64 size, u32 alignment)
++int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
++                        u64 size, u32 alignment)
+ {
+       struct i40e_pf *pf = i40e_hw_to_pf(hw);
+@@ -158,11 +158,11 @@ int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
+ }
+ /**
+- * i40e_free_dma_mem_d - OS specific memory free for shared code
++ * i40e_free_dma_mem - OS specific memory free for shared code
+  * @hw:   pointer to the HW structure
+  * @mem:  ptr to mem struct to free
+  **/
+-int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
++int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
+ {
+       struct i40e_pf *pf = i40e_hw_to_pf(hw);
+@@ -175,13 +175,13 @@ int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
+ }
+ /**
+- * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
++ * i40e_allocate_virt_mem - OS specific memory alloc for shared code
+  * @hw:   pointer to the HW structure
+  * @mem:  ptr to mem struct to fill out
+  * @size: size of memory requested
+  **/
+-int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
+-                           u32 size)
++int i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem,
++                         u32 size)
+ {
+       mem->size = size;
+       mem->va = kzalloc(size, GFP_KERNEL);
+@@ -193,11 +193,11 @@ int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
+ }
+ /**
+- * i40e_free_virt_mem_d - OS specific memory free for shared code
++ * i40e_free_virt_mem - OS specific memory free for shared code
+  * @hw:   pointer to the HW structure
+  * @mem:  ptr to mem struct to free
+  **/
+-int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
++int i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
+ {
+       /* it's ok to kfree a NULL pointer */
+       kfree(mem->va);
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_osdep.h b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+index 997569a4ad57b..70cac3bb31ec3 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_osdep.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+@@ -36,18 +36,11 @@ struct i40e_dma_mem {
+       u32 size;
+ };
+-#define i40e_allocate_dma_mem(h, m, unused, s, a) \
+-                      i40e_allocate_dma_mem_d(h, m, s, a)
+-#define i40e_free_dma_mem(h, m) i40e_free_dma_mem_d(h, m)
+-
+ struct i40e_virt_mem {
+       void *va;
+       u32 size;
+ };
+-#define i40e_allocate_virt_mem(h, m, s) i40e_allocate_virt_mem_d(h, m, s)
+-#define i40e_free_virt_mem(h, m) i40e_free_virt_mem_d(h, m)
+-
+ #define i40e_debug(h, m, s, ...)                              \
+ do {                                                          \
+       if (((m) & (h)->debug_mask))                            \
+-- 
+2.43.0
+
diff --git a/queue-6.6/i40e-split-i40e_osdep.h.patch b/queue-6.6/i40e-split-i40e_osdep.h.patch
new file mode 100644 (file)
index 0000000..108ad1a
--- /dev/null
@@ -0,0 +1,258 @@
+From 5577b3fca6c290696106f13776e8f8ce550f35b2 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:33 +0200
+Subject: i40e: Split i40e_osdep.h
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit 5dfd37c37a44ba47c35ff8e6eaff14c226141111 ]
+
+Header i40e_osdep.h contains only IO primitives and couple of debug
+printing macros. Split this header file to i40e_io.h and i40e_debug.h
+and move i40e_debug_mask enum to i40e_debug.h
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/i40e/i40e_adminq.h |  2 +-
+ drivers/net/ethernet/intel/i40e/i40e_debug.h  | 47 +++++++++++++++++++
+ drivers/net/ethernet/intel/i40e/i40e_hmc.c    |  1 -
+ drivers/net/ethernet/intel/i40e/i40e_io.h     | 16 +++++++
+ .../net/ethernet/intel/i40e/i40e_lan_hmc.c    |  1 -
+ drivers/net/ethernet/intel/i40e/i40e_osdep.h  | 40 ----------------
+ .../net/ethernet/intel/i40e/i40e_prototype.h  |  1 +
+ drivers/net/ethernet/intel/i40e/i40e_type.h   | 31 ++----------
+ 8 files changed, 68 insertions(+), 71 deletions(-)
+ create mode 100644 drivers/net/ethernet/intel/i40e/i40e_debug.h
+ create mode 100644 drivers/net/ethernet/intel/i40e/i40e_io.h
+ delete mode 100644 drivers/net/ethernet/intel/i40e/i40e_osdep.h
+
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.h b/drivers/net/ethernet/intel/i40e/i40e_adminq.h
+index 1c3d2bc5c3f79..80125bea80a2a 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.h
+@@ -4,8 +4,8 @@
+ #ifndef _I40E_ADMINQ_H_
+ #define _I40E_ADMINQ_H_
++#include <linux/mutex.h>
+ #include "i40e_alloc.h"
+-#include "i40e_osdep.h"
+ #include "i40e_adminq_cmd.h"
+ #define I40E_ADMINQ_DESC(R, i)   \
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_debug.h b/drivers/net/ethernet/intel/i40e/i40e_debug.h
+new file mode 100644
+index 0000000000000..27ebc72d8bfe5
+--- /dev/null
++++ b/drivers/net/ethernet/intel/i40e/i40e_debug.h
+@@ -0,0 +1,47 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/* Copyright(c) 2023 Intel Corporation. */
++
++#ifndef _I40E_DEBUG_H_
++#define _I40E_DEBUG_H_
++
++#include <linux/dev_printk.h>
++
++/* debug masks - set these bits in hw->debug_mask to control output */
++enum i40e_debug_mask {
++      I40E_DEBUG_INIT                 = 0x00000001,
++      I40E_DEBUG_RELEASE              = 0x00000002,
++
++      I40E_DEBUG_LINK                 = 0x00000010,
++      I40E_DEBUG_PHY                  = 0x00000020,
++      I40E_DEBUG_HMC                  = 0x00000040,
++      I40E_DEBUG_NVM                  = 0x00000080,
++      I40E_DEBUG_LAN                  = 0x00000100,
++      I40E_DEBUG_FLOW                 = 0x00000200,
++      I40E_DEBUG_DCB                  = 0x00000400,
++      I40E_DEBUG_DIAG                 = 0x00000800,
++      I40E_DEBUG_FD                   = 0x00001000,
++      I40E_DEBUG_PACKAGE              = 0x00002000,
++      I40E_DEBUG_IWARP                = 0x00F00000,
++      I40E_DEBUG_AQ_MESSAGE           = 0x01000000,
++      I40E_DEBUG_AQ_DESCRIPTOR        = 0x02000000,
++      I40E_DEBUG_AQ_DESC_BUFFER       = 0x04000000,
++      I40E_DEBUG_AQ_COMMAND           = 0x06000000,
++      I40E_DEBUG_AQ                   = 0x0F000000,
++
++      I40E_DEBUG_USER                 = 0xF0000000,
++
++      I40E_DEBUG_ALL                  = 0xFFFFFFFF
++};
++
++struct i40e_hw;
++struct device *i40e_hw_to_dev(struct i40e_hw *hw);
++
++#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)
++
++#define i40e_debug(h, m, s, ...)                              \
++do {                                                          \
++      if (((m) & (h)->debug_mask))                            \
++              dev_info(i40e_hw_to_dev(hw), s, ##__VA_ARGS__); \
++} while (0)
++
++#endif /* _I40E_DEBUG_H_ */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+index 7451d346ae83f..b383aea652f3e 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_hmc.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+@@ -2,7 +2,6 @@
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+ #include "i40e.h"
+-#include "i40e_osdep.h"
+ #include "i40e_register.h"
+ #include "i40e_alloc.h"
+ #include "i40e_hmc.h"
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_io.h b/drivers/net/ethernet/intel/i40e/i40e_io.h
+new file mode 100644
+index 0000000000000..2a2ed9a1d476b
+--- /dev/null
++++ b/drivers/net/ethernet/intel/i40e/i40e_io.h
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/* Copyright(c) 2023 Intel Corporation. */
++
++#ifndef _I40E_IO_H_
++#define _I40E_IO_H_
++
++/* get readq/writeq support for 32 bit kernels, use the low-first version */
++#include <linux/io-64-nonatomic-lo-hi.h>
++
++#define wr32(a, reg, value)   writel((value), ((a)->hw_addr + (reg)))
++#define rd32(a, reg)          readl((a)->hw_addr + (reg))
++
++#define rd64(a, reg)          readq((a)->hw_addr + (reg))
++#define i40e_flush(a)         readl((a)->hw_addr + I40E_GLGEN_STAT)
++
++#endif /* _I40E_IO_H_ */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
+index 474365bf06480..830f1de254ef4 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
+@@ -2,7 +2,6 @@
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
+ #include "i40e.h"
+-#include "i40e_osdep.h"
+ #include "i40e_register.h"
+ #include "i40e_type.h"
+ #include "i40e_hmc.h"
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_osdep.h b/drivers/net/ethernet/intel/i40e/i40e_osdep.h
+deleted file mode 100644
+index fd18895cfb56b..0000000000000
+--- a/drivers/net/ethernet/intel/i40e/i40e_osdep.h
++++ /dev/null
+@@ -1,40 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0 */
+-/* Copyright(c) 2013 - 2018 Intel Corporation. */
+-
+-#ifndef _I40E_OSDEP_H_
+-#define _I40E_OSDEP_H_
+-
+-#include <linux/types.h>
+-#include <linux/if_ether.h>
+-#include <linux/if_vlan.h>
+-#include <linux/tcp.h>
+-#include <linux/pci.h>
+-#include <linux/highuid.h>
+-
+-/* get readq/writeq support for 32 bit kernels, use the low-first version */
+-#include <linux/io-64-nonatomic-lo-hi.h>
+-
+-/* File to be the magic between shared code and
+- * actual OS primitives
+- */
+-
+-struct i40e_hw;
+-struct device *i40e_hw_to_dev(struct i40e_hw *hw);
+-
+-#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)
+-
+-#define wr32(a, reg, value)   writel((value), ((a)->hw_addr + (reg)))
+-#define rd32(a, reg)          readl((a)->hw_addr + (reg))
+-
+-#define rd64(a, reg)          readq((a)->hw_addr + (reg))
+-#define i40e_flush(a)         readl((a)->hw_addr + I40E_GLGEN_STAT)
+-
+-#define i40e_debug(h, m, s, ...)                              \
+-do {                                                          \
+-      if (((m) & (h)->debug_mask))                            \
+-              pr_info("i40e %02x:%02x.%x " s,                 \
+-                      (h)->bus.bus_id, (h)->bus.device,       \
+-                      (h)->bus.func, ##__VA_ARGS__);          \
+-} while (0)
+-
+-#endif /* _I40E_OSDEP_H_ */
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
+index 3eeee224f1fb2..9c9234c0706f0 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
+@@ -6,6 +6,7 @@
+ #include "i40e_type.h"
+ #include "i40e_alloc.h"
++#include "i40e_debug.h"
+ #include <linux/avf/virtchnl.h>
+ /* Prototypes for shared code functions that are not in
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h
+index d4c6afe84fdd2..44cea0f4f908d 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_type.h
++++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
+@@ -4,7 +4,9 @@
+ #ifndef _I40E_TYPE_H_
+ #define _I40E_TYPE_H_
+-#include "i40e_osdep.h"
++#include <linux/delay.h>
++#include <linux/if_ether.h>
++#include "i40e_io.h"
+ #include "i40e_register.h"
+ #include "i40e_adminq.h"
+ #include "i40e_hmc.h"
+@@ -43,33 +45,6 @@ typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);
+ #define I40E_QTX_CTL_VM_QUEUE 0x1
+ #define I40E_QTX_CTL_PF_QUEUE 0x2
+-/* debug masks - set these bits in hw->debug_mask to control output */
+-enum i40e_debug_mask {
+-      I40E_DEBUG_INIT                 = 0x00000001,
+-      I40E_DEBUG_RELEASE              = 0x00000002,
+-
+-      I40E_DEBUG_LINK                 = 0x00000010,
+-      I40E_DEBUG_PHY                  = 0x00000020,
+-      I40E_DEBUG_HMC                  = 0x00000040,
+-      I40E_DEBUG_NVM                  = 0x00000080,
+-      I40E_DEBUG_LAN                  = 0x00000100,
+-      I40E_DEBUG_FLOW                 = 0x00000200,
+-      I40E_DEBUG_DCB                  = 0x00000400,
+-      I40E_DEBUG_DIAG                 = 0x00000800,
+-      I40E_DEBUG_FD                   = 0x00001000,
+-      I40E_DEBUG_PACKAGE              = 0x00002000,
+-      I40E_DEBUG_IWARP                = 0x00F00000,
+-      I40E_DEBUG_AQ_MESSAGE           = 0x01000000,
+-      I40E_DEBUG_AQ_DESCRIPTOR        = 0x02000000,
+-      I40E_DEBUG_AQ_DESC_BUFFER       = 0x04000000,
+-      I40E_DEBUG_AQ_COMMAND           = 0x06000000,
+-      I40E_DEBUG_AQ                   = 0x0F000000,
+-
+-      I40E_DEBUG_USER                 = 0xF0000000,
+-
+-      I40E_DEBUG_ALL                  = 0xFFFFFFFF
+-};
+-
+ #define I40E_MDIO_CLAUSE22_STCODE_MASK                I40E_GLGEN_MSCA_STCODE_MASK
+ #define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK  I40E_GLGEN_MSCA_OPCODE_MASK(1)
+ #define I40E_MDIO_CLAUSE22_OPCODE_READ_MASK   I40E_GLGEN_MSCA_OPCODE_MASK(2)
+-- 
+2.43.0
+
diff --git a/queue-6.6/intel-add-bit-macro-includes-where-needed.patch b/queue-6.6/intel-add-bit-macro-includes-where-needed.patch
new file mode 100644 (file)
index 0000000..7c4c2e8
--- /dev/null
@@ -0,0 +1,306 @@
+From d3bf104e6f519a33ed764aea8e720da8fe332bd4 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 5 Dec 2023 17:01:01 -0800
+Subject: intel: add bit macro includes where needed
+
+From: Jesse Brandeburg <jesse.brandeburg@intel.com>
+
+[ Upstream commit 3314f2097dee43defc20554f961a8b17f4787e2d ]
+
+This series is introducing the use of FIELD_GET and FIELD_PREP which
+requires bitfield.h to be included. Fix all the includes in this one
+change, and rearrange includes into alphabetical order to ease
+readability and future maintenance.
+
+virtchnl.h and it's usage was modified to have it's own includes as it
+should. This required including bits.h for virtchnl.h.
+
+Reviewed-by: Marcin Szycik <marcin.szycik@linux.intel.com>
+Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/e1000/e1000_hw.c   |  1 +
+ drivers/net/ethernet/intel/fm10k/fm10k_pf.c   |  1 +
+ drivers/net/ethernet/intel/fm10k/fm10k_vf.c   |  1 +
+ drivers/net/ethernet/intel/i40e/i40e_common.c |  1 +
+ drivers/net/ethernet/intel/i40e/i40e_dcb.c    |  2 ++
+ drivers/net/ethernet/intel/i40e/i40e_nvm.c    |  1 +
+ drivers/net/ethernet/intel/iavf/iavf_common.c |  3 +-
+ .../net/ethernet/intel/iavf/iavf_ethtool.c    |  5 ++--
+ drivers/net/ethernet/intel/iavf/iavf_fdir.c   |  1 +
+ drivers/net/ethernet/intel/iavf/iavf_txrx.c   |  1 +
+ drivers/net/ethernet/intel/igb/e1000_i210.c   |  4 +--
+ drivers/net/ethernet/intel/igb/e1000_nvm.c    |  4 +--
+ drivers/net/ethernet/intel/igb/e1000_phy.c    |  4 +--
+ drivers/net/ethernet/intel/igbvf/netdev.c     | 28 +++++++++----------
+ drivers/net/ethernet/intel/igc/igc_i225.c     |  1 +
+ drivers/net/ethernet/intel/igc/igc_phy.c      |  1 +
+ include/linux/avf/virtchnl.h                  |  1 +
+ 17 files changed, 37 insertions(+), 23 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/e1000/e1000_hw.c b/drivers/net/ethernet/intel/e1000/e1000_hw.c
+index 4542e2bc28e8d..4576511c99f56 100644
+--- a/drivers/net/ethernet/intel/e1000/e1000_hw.c
++++ b/drivers/net/ethernet/intel/e1000/e1000_hw.c
+@@ -5,6 +5,7 @@
+  * Shared functions for accessing and configuring the MAC
+  */
++#include <linux/bitfield.h>
+ #include "e1000.h"
+ static s32 e1000_check_downshift(struct e1000_hw *hw);
+diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
+index af1b0cde36703..ae700a1807c65 100644
+--- a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
++++ b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2019 Intel Corporation. */
++#include <linux/bitfield.h>
+ #include "fm10k_pf.h"
+ #include "fm10k_vf.h"
+diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c
+index dc8ccd378ec92..c50928ec14fff 100644
+--- a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c
++++ b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2019 Intel Corporation. */
++#include <linux/bitfield.h>
+ #include "fm10k_vf.h"
+ /**
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
+index e0685219dbde9..4d7caa1199719 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
+@@ -2,6 +2,7 @@
+ /* Copyright(c) 2013 - 2021 Intel Corporation. */
+ #include <linux/avf/virtchnl.h>
++#include <linux/bitfield.h>
+ #include <linux/delay.h>
+ #include <linux/etherdevice.h>
+ #include <linux/pci.h>
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb.c b/drivers/net/ethernet/intel/i40e/i40e_dcb.c
+index 68602fc375f62..d57dd30b024fa 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_dcb.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_dcb.c
+@@ -1,6 +1,8 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2021 Intel Corporation. */
++#include <linux/bitfield.h>
++#include "i40e_adminq.h"
+ #include "i40e_alloc.h"
+ #include "i40e_dcb.h"
+ #include "i40e_prototype.h"
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+index 77cdbfc19d477..e5aec09d58e27 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
++#include <linux/bitfield.h>
+ #include <linux/delay.h>
+ #include "i40e_alloc.h"
+ #include "i40e_prototype.h"
+diff --git a/drivers/net/ethernet/intel/iavf/iavf_common.c b/drivers/net/ethernet/intel/iavf/iavf_common.c
+index 1afd761d80520..f7988cf5efa58 100644
+--- a/drivers/net/ethernet/intel/iavf/iavf_common.c
++++ b/drivers/net/ethernet/intel/iavf/iavf_common.c
+@@ -1,10 +1,11 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
++#include <linux/avf/virtchnl.h>
++#include <linux/bitfield.h>
+ #include "iavf_type.h"
+ #include "iavf_adminq.h"
+ #include "iavf_prototype.h"
+-#include <linux/avf/virtchnl.h>
+ /**
+  * iavf_set_mac_type - Sets MAC type
+diff --git a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c
+index 892c6a4f03bb8..1ac97bd606e38 100644
+--- a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c
++++ b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c
+@@ -1,11 +1,12 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
++#include <linux/bitfield.h>
++#include <linux/uaccess.h>
++
+ /* ethtool support for iavf */
+ #include "iavf.h"
+-#include <linux/uaccess.h>
+-
+ /* ethtool statistics helpers */
+ /**
+diff --git a/drivers/net/ethernet/intel/iavf/iavf_fdir.c b/drivers/net/ethernet/intel/iavf/iavf_fdir.c
+index 03e774bd2a5b4..65ddcd81c993e 100644
+--- a/drivers/net/ethernet/intel/iavf/iavf_fdir.c
++++ b/drivers/net/ethernet/intel/iavf/iavf_fdir.c
+@@ -3,6 +3,7 @@
+ /* flow director ethtool support for iavf */
++#include <linux/bitfield.h>
+ #include "iavf.h"
+ #define GTPU_PORT     2152
+diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.c b/drivers/net/ethernet/intel/iavf/iavf_txrx.c
+index 8c5f6096b0022..f998ecf743c46 100644
+--- a/drivers/net/ethernet/intel/iavf/iavf_txrx.c
++++ b/drivers/net/ethernet/intel/iavf/iavf_txrx.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2013 - 2018 Intel Corporation. */
++#include <linux/bitfield.h>
+ #include <linux/prefetch.h>
+ #include "iavf.h"
+diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c
+index b9b9d35494d27..53b396fd194a3 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_i210.c
++++ b/drivers/net/ethernet/intel/igb/e1000_i210.c
+@@ -5,9 +5,9 @@
+  * e1000_i211
+  */
+-#include <linux/types.h>
++#include <linux/bitfield.h>
+ #include <linux/if_ether.h>
+-
++#include <linux/types.h>
+ #include "e1000_hw.h"
+ #include "e1000_i210.h"
+diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.c b/drivers/net/ethernet/intel/igb/e1000_nvm.c
+index fa136e6e93285..0da57e89593a0 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_nvm.c
++++ b/drivers/net/ethernet/intel/igb/e1000_nvm.c
+@@ -1,9 +1,9 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2007 - 2018 Intel Corporation. */
+-#include <linux/if_ether.h>
++#include <linux/bitfield.h>
+ #include <linux/delay.h>
+-
++#include <linux/if_ether.h>
+ #include "e1000_mac.h"
+ #include "e1000_nvm.h"
+diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
+index a018000f7db92..3c1b562a3271c 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
++++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
+@@ -1,9 +1,9 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2007 - 2018 Intel Corporation. */
+-#include <linux/if_ether.h>
++#include <linux/bitfield.h>
+ #include <linux/delay.h>
+-
++#include <linux/if_ether.h>
+ #include "e1000_mac.h"
+ #include "e1000_phy.h"
+diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c
+index 7ff2752dd763a..c748668bf2fce 100644
+--- a/drivers/net/ethernet/intel/igbvf/netdev.c
++++ b/drivers/net/ethernet/intel/igbvf/netdev.c
+@@ -3,25 +3,25 @@
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+-#include <linux/module.h>
+-#include <linux/types.h>
+-#include <linux/init.h>
+-#include <linux/pci.h>
+-#include <linux/vmalloc.h>
+-#include <linux/pagemap.h>
++#include <linux/bitfield.h>
+ #include <linux/delay.h>
+-#include <linux/netdevice.h>
+-#include <linux/tcp.h>
+-#include <linux/ipv6.h>
+-#include <linux/slab.h>
+-#include <net/checksum.h>
+-#include <net/ip6_checksum.h>
+-#include <linux/mii.h>
+ #include <linux/ethtool.h>
+ #include <linux/if_vlan.h>
++#include <linux/init.h>
++#include <linux/ipv6.h>
++#include <linux/mii.h>
++#include <linux/module.h>
++#include <linux/netdevice.h>
++#include <linux/pagemap.h>
++#include <linux/pci.h>
+ #include <linux/prefetch.h>
+ #include <linux/sctp.h>
+-
++#include <linux/slab.h>
++#include <linux/tcp.h>
++#include <linux/types.h>
++#include <linux/vmalloc.h>
++#include <net/checksum.h>
++#include <net/ip6_checksum.h>
+ #include "igbvf.h"
+ char igbvf_driver_name[] = "igbvf";
+diff --git a/drivers/net/ethernet/intel/igc/igc_i225.c b/drivers/net/ethernet/intel/igc/igc_i225.c
+index 17546a035ab19..d2562c8e8015e 100644
+--- a/drivers/net/ethernet/intel/igc/igc_i225.c
++++ b/drivers/net/ethernet/intel/igc/igc_i225.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright (c)  2018 Intel Corporation */
++#include <linux/bitfield.h>
+ #include <linux/delay.h>
+ #include "igc_hw.h"
+diff --git a/drivers/net/ethernet/intel/igc/igc_phy.c b/drivers/net/ethernet/intel/igc/igc_phy.c
+index 53b77c969c857..d0d9e7170154c 100644
+--- a/drivers/net/ethernet/intel/igc/igc_phy.c
++++ b/drivers/net/ethernet/intel/igc/igc_phy.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright (c)  2018 Intel Corporation */
++#include <linux/bitfield.h>
+ #include "igc_phy.h"
+ /**
+diff --git a/include/linux/avf/virtchnl.h b/include/linux/avf/virtchnl.h
+index 6424aa06fb08d..6e950594215a0 100644
+--- a/include/linux/avf/virtchnl.h
++++ b/include/linux/avf/virtchnl.h
+@@ -5,6 +5,7 @@
+ #define _VIRTCHNL_H_
+ #include <linux/bitops.h>
++#include <linux/bits.h>
+ #include <linux/overflow.h>
+ #include <uapi/linux/if_ether.h>
+-- 
+2.43.0
+
diff --git a/queue-6.6/intel-legacy-field-get-conversion.patch b/queue-6.6/intel-legacy-field-get-conversion.patch
new file mode 100644 (file)
index 0000000..e788a72
--- /dev/null
@@ -0,0 +1,987 @@
+From 9ecba4151dd81e086d29a7173fe45ef6f6644065 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 5 Dec 2023 17:01:08 -0800
+Subject: intel: legacy: field get conversion
+
+From: Jesse Brandeburg <jesse.brandeburg@intel.com>
+
+[ Upstream commit b9a4525450758dd75edbdaee97425ba7546c2b5c ]
+
+Refactor several older Intel drivers to use FIELD_GET(), which reduces
+lines of code and adds clarity of intent.
+
+This code was generated by the following coccinelle/spatch script and
+then manually repaired.
+
+@get@
+constant shift,mask;
+type T;
+expression a;
+@@
+(
+-((T)((a) & mask) >> shift)
++FIELD_GET(mask, a)
+
+and applied via:
+spatch --sp-file field_prep.cocci --in-place --dir \
+ drivers/net/ethernet/intel/
+
+Cc: Julia Lawall <Julia.Lawall@inria.fr>
+CC: Alexander Lobakin <aleksander.lobakin@intel.com>
+Reviewed-by: Marcin Szycik <marcin.szycik@linux.intel.com>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/intel/e1000/e1000_hw.c   | 45 ++++++++-----------
+ .../net/ethernet/intel/e1000e/80003es2lan.c   |  3 +-
+ drivers/net/ethernet/intel/e1000e/82571.c     |  3 +-
+ drivers/net/ethernet/intel/e1000e/ethtool.c   |  7 ++-
+ drivers/net/ethernet/intel/e1000e/ich8lan.c   | 18 +++-----
+ drivers/net/ethernet/intel/e1000e/mac.c       |  2 +-
+ drivers/net/ethernet/intel/e1000e/netdev.c    | 11 ++---
+ drivers/net/ethernet/intel/e1000e/phy.c       | 17 +++----
+ drivers/net/ethernet/intel/fm10k/fm10k_pf.c   |  3 +-
+ drivers/net/ethernet/intel/fm10k/fm10k_vf.c   |  9 ++--
+ drivers/net/ethernet/intel/igb/e1000_82575.c  | 29 +++++-------
+ drivers/net/ethernet/intel/igb/e1000_i210.c   | 15 ++++---
+ drivers/net/ethernet/intel/igb/e1000_mac.c    |  2 +-
+ drivers/net/ethernet/intel/igb/e1000_nvm.c    | 14 +++---
+ drivers/net/ethernet/intel/igb/e1000_phy.c    |  9 ++--
+ drivers/net/ethernet/intel/igb/igb_ethtool.c  |  8 ++--
+ drivers/net/ethernet/intel/igb/igb_main.c     |  4 +-
+ drivers/net/ethernet/intel/igbvf/mbx.c        |  1 +
+ drivers/net/ethernet/intel/igbvf/netdev.c     |  5 +--
+ .../net/ethernet/intel/ixgbe/ixgbe_common.c   | 30 ++++++-------
+ drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |  2 +-
+ drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c  |  8 ++--
+ .../net/ethernet/intel/ixgbe/ixgbe_sriov.c    |  8 ++--
+ drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c |  8 ++--
+ drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 19 ++++----
+ 25 files changed, 118 insertions(+), 162 deletions(-)
+
+diff --git a/drivers/net/ethernet/intel/e1000/e1000_hw.c b/drivers/net/ethernet/intel/e1000/e1000_hw.c
+index 4576511c99f56..f9328f2e669f8 100644
+--- a/drivers/net/ethernet/intel/e1000/e1000_hw.c
++++ b/drivers/net/ethernet/intel/e1000/e1000_hw.c
+@@ -3261,8 +3261,7 @@ static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
+               return ret_val;
+       phy_info->mdix_mode =
+-          (e1000_auto_x_mode) ((phy_data & IGP01E1000_PSSR_MDIX) >>
+-                               IGP01E1000_PSSR_MDIX_SHIFT);
++          (e1000_auto_x_mode)FIELD_GET(IGP01E1000_PSSR_MDIX, phy_data);
+       if ((phy_data & IGP01E1000_PSSR_SPEED_MASK) ==
+           IGP01E1000_PSSR_SPEED_1000MBPS) {
+@@ -3273,11 +3272,11 @@ static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
+               if (ret_val)
+                       return ret_val;
+-              phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >>
+-                                    SR_1000T_LOCAL_RX_STATUS_SHIFT) ?
++              phy_info->local_rx = FIELD_GET(SR_1000T_LOCAL_RX_STATUS,
++                                             phy_data) ?
+                   e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok;
+-              phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >>
+-                                     SR_1000T_REMOTE_RX_STATUS_SHIFT) ?
++              phy_info->remote_rx = FIELD_GET(SR_1000T_REMOTE_RX_STATUS,
++                                              phy_data) ?
+                   e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok;
+               /* Get cable length */
+@@ -3327,14 +3326,12 @@ static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
+               return ret_val;
+       phy_info->extended_10bt_distance =
+-          ((phy_data & M88E1000_PSCR_10BT_EXT_DIST_ENABLE) >>
+-           M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT) ?
++          FIELD_GET(M88E1000_PSCR_10BT_EXT_DIST_ENABLE, phy_data) ?
+           e1000_10bt_ext_dist_enable_lower :
+           e1000_10bt_ext_dist_enable_normal;
+       phy_info->polarity_correction =
+-          ((phy_data & M88E1000_PSCR_POLARITY_REVERSAL) >>
+-           M88E1000_PSCR_POLARITY_REVERSAL_SHIFT) ?
++          FIELD_GET(M88E1000_PSCR_POLARITY_REVERSAL, phy_data) ?
+           e1000_polarity_reversal_disabled : e1000_polarity_reversal_enabled;
+       /* Check polarity status */
+@@ -3348,27 +3345,25 @@ static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
+               return ret_val;
+       phy_info->mdix_mode =
+-          (e1000_auto_x_mode) ((phy_data & M88E1000_PSSR_MDIX) >>
+-                               M88E1000_PSSR_MDIX_SHIFT);
++          (e1000_auto_x_mode)FIELD_GET(M88E1000_PSSR_MDIX, phy_data);
+       if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
+               /* Cable Length Estimation and Local/Remote Receiver Information
+                * are only valid at 1000 Mbps.
+                */
+               phy_info->cable_length =
+-                  (e1000_cable_length) ((phy_data &
+-                                         M88E1000_PSSR_CABLE_LENGTH) >>
+-                                        M88E1000_PSSR_CABLE_LENGTH_SHIFT);
++                  (e1000_cable_length)FIELD_GET(M88E1000_PSSR_CABLE_LENGTH,
++                                                phy_data);
+               ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
+               if (ret_val)
+                       return ret_val;
+-              phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >>
+-                                    SR_1000T_LOCAL_RX_STATUS_SHIFT) ?
++              phy_info->local_rx = FIELD_GET(SR_1000T_LOCAL_RX_STATUS,
++                                             phy_data) ?
+                   e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok;
+-              phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >>
+-                                     SR_1000T_REMOTE_RX_STATUS_SHIFT) ?
++              phy_info->remote_rx = FIELD_GET(SR_1000T_REMOTE_RX_STATUS,
++                                              phy_data) ?
+                   e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok;
+       }
+@@ -3516,7 +3511,7 @@ s32 e1000_init_eeprom_params(struct e1000_hw *hw)
+               if (ret_val)
+                       return ret_val;
+               eeprom_size =
+-                  (eeprom_size & EEPROM_SIZE_MASK) >> EEPROM_SIZE_SHIFT;
++                  FIELD_GET(EEPROM_SIZE_MASK, eeprom_size);
+               /* 256B eeprom size was not supported in earlier hardware, so we
+                * bump eeprom_size up one to ensure that "1" (which maps to
+                * 256B) is never the result used in the shifting logic below.
+@@ -4892,8 +4887,7 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
+                                            &phy_data);
+               if (ret_val)
+                       return ret_val;
+-              cable_length = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+-                  M88E1000_PSSR_CABLE_LENGTH_SHIFT;
++              cable_length = FIELD_GET(M88E1000_PSSR_CABLE_LENGTH, phy_data);
+               /* Convert the enum value to ranged values */
+               switch (cable_length) {
+@@ -5002,8 +4996,7 @@ static s32 e1000_check_polarity(struct e1000_hw *hw,
+                                            &phy_data);
+               if (ret_val)
+                       return ret_val;
+-              *polarity = ((phy_data & M88E1000_PSSR_REV_POLARITY) >>
+-                           M88E1000_PSSR_REV_POLARITY_SHIFT) ?
++              *polarity = FIELD_GET(M88E1000_PSSR_REV_POLARITY, phy_data) ?
+                   e1000_rev_polarity_reversed : e1000_rev_polarity_normal;
+       } else if (hw->phy_type == e1000_phy_igp) {
+@@ -5073,8 +5066,8 @@ static s32 e1000_check_downshift(struct e1000_hw *hw)
+               if (ret_val)
+                       return ret_val;
+-              hw->speed_downgraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) >>
+-                  M88E1000_PSSR_DOWNSHIFT_SHIFT;
++              hw->speed_downgraded = FIELD_GET(M88E1000_PSSR_DOWNSHIFT,
++                                               phy_data);
+       }
+       return E1000_SUCCESS;
+diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
+index be9c695dde127..c51fb6bf9c4e0 100644
+--- a/drivers/net/ethernet/intel/e1000e/80003es2lan.c
++++ b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
+@@ -92,8 +92,7 @@ static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
+       nvm->type = e1000_nvm_eeprom_spi;
+-      size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+-                   E1000_EECD_SIZE_EX_SHIFT);
++      size = (u16)FIELD_GET(E1000_EECD_SIZE_EX_MASK, eecd);
+       /* Added to a constant, "size" becomes the left-shift value
+        * for setting word_size.
+diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c
+index 0b1e890dd583b..969f855a79ee6 100644
+--- a/drivers/net/ethernet/intel/e1000e/82571.c
++++ b/drivers/net/ethernet/intel/e1000e/82571.c
+@@ -157,8 +157,7 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
+               fallthrough;
+       default:
+               nvm->type = e1000_nvm_eeprom_spi;
+-              size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+-                           E1000_EECD_SIZE_EX_SHIFT);
++              size = (u16)FIELD_GET(E1000_EECD_SIZE_EX_MASK, eecd);
+               /* Added to a constant, "size" becomes the left-shift value
+                * for setting word_size.
+                */
+diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c
+index 9835e6a90d56c..fc0f98ea61332 100644
+--- a/drivers/net/ethernet/intel/e1000e/ethtool.c
++++ b/drivers/net/ethernet/intel/e1000e/ethtool.c
+@@ -654,8 +654,8 @@ static void e1000_get_drvinfo(struct net_device *netdev,
+        */
+       snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
+                "%d.%d-%d",
+-               (adapter->eeprom_vers & 0xF000) >> 12,
+-               (adapter->eeprom_vers & 0x0FF0) >> 4,
++               FIELD_GET(0xF000, adapter->eeprom_vers),
++               FIELD_GET(0x0FF0, adapter->eeprom_vers),
+                (adapter->eeprom_vers & 0x000F));
+       strscpy(drvinfo->bus_info, pci_name(adapter->pdev),
+@@ -925,8 +925,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
+       }
+       if (mac->type >= e1000_pch_lpt)
+-              wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
+-                  E1000_FWSM_WLOCK_MAC_SHIFT;
++              wlock_mac = FIELD_GET(E1000_FWSM_WLOCK_MAC_MASK, er32(FWSM));
+       for (i = 0; i < mac->rar_entry_count; i++) {
+               if (mac->type >= e1000_pch_lpt) {
+diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
+index 39e9fc601bf5a..a2788fd5f8bb8 100644
+--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
++++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
+@@ -1072,13 +1072,11 @@ static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link)
+               lat_enc_d = (lat_enc & E1000_LTRV_VALUE_MASK) *
+                            (1U << (E1000_LTRV_SCALE_FACTOR *
+-                           ((lat_enc & E1000_LTRV_SCALE_MASK)
+-                           >> E1000_LTRV_SCALE_SHIFT)));
++                           FIELD_GET(E1000_LTRV_SCALE_MASK, lat_enc)));
+               max_ltr_enc_d = (max_ltr_enc & E1000_LTRV_VALUE_MASK) *
+-                               (1U << (E1000_LTRV_SCALE_FACTOR *
+-                               ((max_ltr_enc & E1000_LTRV_SCALE_MASK)
+-                               >> E1000_LTRV_SCALE_SHIFT)));
++                      (1U << (E1000_LTRV_SCALE_FACTOR *
++                              FIELD_GET(E1000_LTRV_SCALE_MASK, max_ltr_enc)));
+               if (lat_enc_d > max_ltr_enc_d)
+                       lat_enc = max_ltr_enc;
+@@ -2075,8 +2073,7 @@ static s32 e1000_write_smbus_addr(struct e1000_hw *hw)
+ {
+       u16 phy_data;
+       u32 strap = er32(STRAP);
+-      u32 freq = (strap & E1000_STRAP_SMT_FREQ_MASK) >>
+-          E1000_STRAP_SMT_FREQ_SHIFT;
++      u32 freq = FIELD_GET(E1000_STRAP_SMT_FREQ_MASK, strap);
+       s32 ret_val;
+       strap &= E1000_STRAP_SMBUS_ADDRESS_MASK;
+@@ -2562,8 +2559,7 @@ void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw)
+               hw->phy.ops.write_reg_page(hw, BM_RAR_H(i),
+                                          (u16)(mac_reg & 0xFFFF));
+               hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i),
+-                                         (u16)((mac_reg & E1000_RAH_AV)
+-                                               >> 16));
++                                         FIELD_GET(E1000_RAH_AV, mac_reg));
+       }
+       e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);
+@@ -3205,7 +3201,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
+                                                        &nvm_dword);
+               if (ret_val)
+                       return ret_val;
+-              sig_byte = (u8)((nvm_dword & 0xFF00) >> 8);
++              sig_byte = FIELD_GET(0xFF00, nvm_dword);
+               if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
+                   E1000_ICH_NVM_SIG_VALUE) {
+                       *bank = 0;
+@@ -3218,7 +3214,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
+                                                        &nvm_dword);
+               if (ret_val)
+                       return ret_val;
+-              sig_byte = (u8)((nvm_dword & 0xFF00) >> 8);
++              sig_byte = FIELD_GET(0xFF00, nvm_dword);
+               if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
+                   E1000_ICH_NVM_SIG_VALUE) {
+                       *bank = 1;
+diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c
+index 5df7ad93f3d77..30515bfb259ea 100644
+--- a/drivers/net/ethernet/intel/e1000e/mac.c
++++ b/drivers/net/ethernet/intel/e1000e/mac.c
+@@ -52,7 +52,7 @@ void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
+        * for the device regardless of function swap state.
+        */
+       reg = er32(STATUS);
+-      bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
++      bus->func = FIELD_GET(E1000_STATUS_FUNC_MASK, reg);
+ }
+ /**
+diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
+index f536c856727cb..af5d9d97a0d6c 100644
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -1788,8 +1788,7 @@ static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
+               adapter->corr_errors +=
+                   pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
+               adapter->uncorr_errors +=
+-                  (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
+-                  E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
++                  FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
+               /* Do the reset outside of interrupt context */
+               schedule_work(&adapter->reset_task);
+@@ -1868,8 +1867,7 @@ static irqreturn_t e1000_intr(int __always_unused irq, void *data)
+               adapter->corr_errors +=
+                   pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
+               adapter->uncorr_errors +=
+-                  (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
+-                  E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
++                  FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
+               /* Do the reset outside of interrupt context */
+               schedule_work(&adapter->reset_task);
+@@ -5031,8 +5029,7 @@ static void e1000e_update_stats(struct e1000_adapter *adapter)
+               adapter->corr_errors +=
+                   pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
+               adapter->uncorr_errors +=
+-                  (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
+-                  E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
++                  FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
+       }
+ }
+@@ -6249,7 +6246,7 @@ static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
+               phy_reg |= BM_RCTL_MPE;
+       phy_reg &= ~(BM_RCTL_MO_MASK);
+       if (mac_reg & E1000_RCTL_MO_3)
+-              phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
++              phy_reg |= (FIELD_GET(E1000_RCTL_MO_3, mac_reg)
+                           << BM_RCTL_MO_SHIFT);
+       if (mac_reg & E1000_RCTL_BAM)
+               phy_reg |= BM_RCTL_BAM;
+diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
+index 08c3d477dd6f7..96ff0ca561b6c 100644
+--- a/drivers/net/ethernet/intel/e1000e/phy.c
++++ b/drivers/net/ethernet/intel/e1000e/phy.c
+@@ -154,10 +154,9 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+               e_dbg("MDI Read PHY Reg Address %d Error\n", offset);
+               return -E1000_ERR_PHY;
+       }
+-      if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {
++      if (FIELD_GET(E1000_MDIC_REG_MASK, mdic) != offset) {
+               e_dbg("MDI Read offset error - requested %d, returned %d\n",
+-                    offset,
+-                    (mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT);
++                    offset, FIELD_GET(E1000_MDIC_REG_MASK, mdic));
+               return -E1000_ERR_PHY;
+       }
+       *data = (u16)mdic;
+@@ -167,7 +166,6 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+        */
+       if (hw->mac.type == e1000_pch2lan)
+               udelay(100);
+-
+       return 0;
+ }
+@@ -218,10 +216,9 @@ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
+               e_dbg("MDI Write PHY Red Address %d Error\n", offset);
+               return -E1000_ERR_PHY;
+       }
+-      if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {
++      if (FIELD_GET(E1000_MDIC_REG_MASK, mdic) != offset) {
+               e_dbg("MDI Write offset error - requested %d, returned %d\n",
+-                    offset,
+-                    (mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT);
++                    offset, FIELD_GET(E1000_MDIC_REG_MASK, mdic));
+               return -E1000_ERR_PHY;
+       }
+@@ -1793,8 +1790,7 @@ s32 e1000e_get_cable_length_m88(struct e1000_hw *hw)
+       if (ret_val)
+               return ret_val;
+-      index = ((phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+-               M88E1000_PSSR_CABLE_LENGTH_SHIFT);
++      index = FIELD_GET(M88E1000_PSSR_CABLE_LENGTH, phy_data);
+       if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1)
+               return -E1000_ERR_PHY;
+@@ -3234,8 +3230,7 @@ s32 e1000_get_cable_length_82577(struct e1000_hw *hw)
+       if (ret_val)
+               return ret_val;
+-      length = ((phy_data & I82577_DSTATUS_CABLE_LENGTH) >>
+-                I82577_DSTATUS_CABLE_LENGTH_SHIFT);
++      length = FIELD_GET(I82577_DSTATUS_CABLE_LENGTH, phy_data);
+       if (length == E1000_CABLE_LENGTH_UNDEFINED)
+               return -E1000_ERR_PHY;
+diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
+index ae700a1807c65..aed5e0bf6313e 100644
+--- a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
++++ b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c
+@@ -1576,8 +1576,7 @@ static s32 fm10k_get_fault_pf(struct fm10k_hw *hw, int type,
+       if (func & FM10K_FAULT_FUNC_PF)
+               fault->func = 0;
+       else
+-              fault->func = 1 + ((func & FM10K_FAULT_FUNC_VF_MASK) >>
+-                                 FM10K_FAULT_FUNC_VF_SHIFT);
++              fault->func = 1 + FIELD_GET(FM10K_FAULT_FUNC_VF_MASK, func);
+       /* record fault type */
+       fault->type = func & FM10K_FAULT_FUNC_TYPE_MASK;
+diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c
+index c50928ec14fff..7fb1961f29210 100644
+--- a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c
++++ b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c
+@@ -127,15 +127,14 @@ static s32 fm10k_init_hw_vf(struct fm10k_hw *hw)
+       hw->mac.max_queues = i;
+       /* fetch default VLAN and ITR scale */
+-      hw->mac.default_vid = (fm10k_read_reg(hw, FM10K_TXQCTL(0)) &
+-                             FM10K_TXQCTL_VID_MASK) >> FM10K_TXQCTL_VID_SHIFT;
++      hw->mac.default_vid = FIELD_GET(FM10K_TXQCTL_VID_MASK,
++                                      fm10k_read_reg(hw, FM10K_TXQCTL(0)));
+       /* Read the ITR scale from TDLEN. See the definition of
+        * FM10K_TDLEN_ITR_SCALE_SHIFT for more information about how TDLEN is
+        * used here.
+        */
+-      hw->mac.itr_scale = (fm10k_read_reg(hw, FM10K_TDLEN(0)) &
+-                           FM10K_TDLEN_ITR_SCALE_MASK) >>
+-                          FM10K_TDLEN_ITR_SCALE_SHIFT;
++      hw->mac.itr_scale = FIELD_GET(FM10K_TDLEN_ITR_SCALE_MASK,
++                                    fm10k_read_reg(hw, FM10K_TDLEN(0)));
+       return 0;
+diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
+index 8d6e44ee1895a..64dfc362d1dc4 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
++++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
+@@ -222,8 +222,7 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
+       }
+       /* set lan id */
+-      hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >>
+-                      E1000_STATUS_FUNC_SHIFT;
++      hw->bus.func = FIELD_GET(E1000_STATUS_FUNC_MASK, rd32(E1000_STATUS));
+       /* Set phy->phy_addr and phy->id. */
+       ret_val = igb_get_phy_id_82575(hw);
+@@ -262,8 +261,8 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
+                       if (ret_val)
+                               goto out;
+-                      data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
+-                             E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
++                      data = FIELD_GET(E1000_M88E1112_MAC_CTRL_1_MODE_MASK,
++                                       data);
+                       if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
+                           data == E1000_M88E1112_AUTO_COPPER_BASEX)
+                               hw->mac.ops.check_for_link =
+@@ -330,8 +329,7 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
+       u32 eecd = rd32(E1000_EECD);
+       u16 size;
+-      size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+-                   E1000_EECD_SIZE_EX_SHIFT);
++      size = FIELD_GET(E1000_EECD_SIZE_EX_MASK, eecd);
+       /* Added to a constant, "size" becomes the left-shift value
+        * for setting word_size.
+@@ -2798,7 +2796,7 @@ static s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)
+               return 0;
+       hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);
+-      if (((ets_cfg & NVM_ETS_TYPE_MASK) >> NVM_ETS_TYPE_SHIFT)
++      if (FIELD_GET(NVM_ETS_TYPE_MASK, ets_cfg)
+           != NVM_ETS_TYPE_EMC)
+               return E1000_NOT_IMPLEMENTED;
+@@ -2808,10 +2806,8 @@ static s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)
+       for (i = 1; i < num_sensors; i++) {
+               hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor);
+-              sensor_index = ((ets_sensor & NVM_ETS_DATA_INDEX_MASK) >>
+-                              NVM_ETS_DATA_INDEX_SHIFT);
+-              sensor_location = ((ets_sensor & NVM_ETS_DATA_LOC_MASK) >>
+-                                 NVM_ETS_DATA_LOC_SHIFT);
++              sensor_index = FIELD_GET(NVM_ETS_DATA_INDEX_MASK, ets_sensor);
++              sensor_location = FIELD_GET(NVM_ETS_DATA_LOC_MASK, ets_sensor);
+               if (sensor_location != 0)
+                       hw->phy.ops.read_i2c_byte(hw,
+@@ -2859,20 +2855,17 @@ static s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw)
+               return 0;
+       hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);
+-      if (((ets_cfg & NVM_ETS_TYPE_MASK) >> NVM_ETS_TYPE_SHIFT)
++      if (FIELD_GET(NVM_ETS_TYPE_MASK, ets_cfg)
+           != NVM_ETS_TYPE_EMC)
+               return E1000_NOT_IMPLEMENTED;
+-      low_thresh_delta = ((ets_cfg & NVM_ETS_LTHRES_DELTA_MASK) >>
+-                          NVM_ETS_LTHRES_DELTA_SHIFT);
++      low_thresh_delta = FIELD_GET(NVM_ETS_LTHRES_DELTA_MASK, ets_cfg);
+       num_sensors = (ets_cfg & NVM_ETS_NUM_SENSORS_MASK);
+       for (i = 1; i <= num_sensors; i++) {
+               hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor);
+-              sensor_index = ((ets_sensor & NVM_ETS_DATA_INDEX_MASK) >>
+-                              NVM_ETS_DATA_INDEX_SHIFT);
+-              sensor_location = ((ets_sensor & NVM_ETS_DATA_LOC_MASK) >>
+-                                 NVM_ETS_DATA_LOC_SHIFT);
++              sensor_index = FIELD_GET(NVM_ETS_DATA_INDEX_MASK, ets_sensor);
++              sensor_location = FIELD_GET(NVM_ETS_DATA_LOC_MASK, ets_sensor);
+               therm_limit = ets_sensor & NVM_ETS_DATA_HTHRESH_MASK;
+               hw->phy.ops.write_i2c_byte(hw,
+diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c
+index 53b396fd194a3..503b239868e8e 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_i210.c
++++ b/drivers/net/ethernet/intel/igb/e1000_i210.c
+@@ -473,7 +473,7 @@ s32 igb_read_invm_version(struct e1000_hw *hw,
+               /* Check if we have second version location used */
+               else if ((i == 1) &&
+                        ((*record & E1000_INVM_VER_FIELD_TWO) == 0)) {
+-                      version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
++                      version = FIELD_GET(E1000_INVM_VER_FIELD_ONE, *record);
+                       status = 0;
+                       break;
+               }
+@@ -483,8 +483,8 @@ s32 igb_read_invm_version(struct e1000_hw *hw,
+               else if ((((*record & E1000_INVM_VER_FIELD_ONE) == 0) &&
+                        ((*record & 0x3) == 0)) || (((*record & 0x3) != 0) &&
+                        (i != 1))) {
+-                      version = (*next_record & E1000_INVM_VER_FIELD_TWO)
+-                                >> 13;
++                      version = FIELD_GET(E1000_INVM_VER_FIELD_TWO,
++                                          *next_record);
+                       status = 0;
+                       break;
+               }
+@@ -493,15 +493,15 @@ s32 igb_read_invm_version(struct e1000_hw *hw,
+                */
+               else if (((*record & E1000_INVM_VER_FIELD_TWO) == 0) &&
+                        ((*record & 0x3) == 0)) {
+-                      version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
++                      version = FIELD_GET(E1000_INVM_VER_FIELD_ONE, *record);
+                       status = 0;
+                       break;
+               }
+       }
+       if (!status) {
+-              invm_ver->invm_major = (version & E1000_INVM_MAJOR_MASK)
+-                                      >> E1000_INVM_MAJOR_SHIFT;
++              invm_ver->invm_major = FIELD_GET(E1000_INVM_MAJOR_MASK,
++                                               version);
+               invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK;
+       }
+       /* Read Image Type */
+@@ -520,7 +520,8 @@ s32 igb_read_invm_version(struct e1000_hw *hw,
+                        ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) ||
+                        ((((*record & 0x3) != 0) && (i != 1)))) {
+                       invm_ver->invm_img_type =
+-                              (*next_record & E1000_INVM_IMGTYPE_FIELD) >> 23;
++                              FIELD_GET(E1000_INVM_IMGTYPE_FIELD,
++                                        *next_record);
+                       status = 0;
+                       break;
+               }
+diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c
+index caf91c6f52b4d..ceaec2cf08a43 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_mac.c
++++ b/drivers/net/ethernet/intel/igb/e1000_mac.c
+@@ -56,7 +56,7 @@ s32 igb_get_bus_info_pcie(struct e1000_hw *hw)
+       }
+       reg = rd32(E1000_STATUS);
+-      bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
++      bus->func = FIELD_GET(E1000_STATUS_FUNC_MASK, reg);
+       return 0;
+ }
+diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.c b/drivers/net/ethernet/intel/igb/e1000_nvm.c
+index 0da57e89593a0..2dcd64d6dec31 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_nvm.c
++++ b/drivers/net/ethernet/intel/igb/e1000_nvm.c
+@@ -708,10 +708,10 @@ void igb_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
+                */
+               if ((etrack_test &  NVM_MAJOR_MASK) != NVM_ETRACK_VALID) {
+                       hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
+-                      fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
+-                                            >> NVM_MAJOR_SHIFT;
+-                      fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK)
+-                                            >> NVM_MINOR_SHIFT;
++                      fw_vers->eep_major = FIELD_GET(NVM_MAJOR_MASK,
++                                                     fw_version);
++                      fw_vers->eep_minor = FIELD_GET(NVM_MINOR_MASK,
++                                                     fw_version);
+                       fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK);
+                       goto etrack_id;
+               }
+@@ -753,15 +753,13 @@ void igb_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
+               return;
+       }
+       hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
+-      fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
+-                            >> NVM_MAJOR_SHIFT;
++      fw_vers->eep_major = FIELD_GET(NVM_MAJOR_MASK, fw_version);
+       /* check for old style version format in newer images*/
+       if ((fw_version & NVM_NEW_DEC_MASK) == 0x0) {
+               eeprom_verl = (fw_version & NVM_COMB_VER_MASK);
+       } else {
+-              eeprom_verl = (fw_version & NVM_MINOR_MASK)
+-                              >> NVM_MINOR_SHIFT;
++              eeprom_verl = FIELD_GET(NVM_MINOR_MASK, fw_version);
+       }
+       /* Convert minor value to hex before assigning to output struct
+        * Val to be converted will not be higher than 99, per tool output
+diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
+index 3c1b562a3271c..bed94e50a6693 100644
+--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
++++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
+@@ -1682,8 +1682,7 @@ s32 igb_get_cable_length_m88(struct e1000_hw *hw)
+       if (ret_val)
+               goto out;
+-      index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+-              M88E1000_PSSR_CABLE_LENGTH_SHIFT;
++      index = FIELD_GET(M88E1000_PSSR_CABLE_LENGTH, phy_data);
+       if (index >= ARRAY_SIZE(e1000_m88_cable_length_table) - 1) {
+               ret_val = -E1000_ERR_PHY;
+               goto out;
+@@ -1796,8 +1795,7 @@ s32 igb_get_cable_length_m88_gen2(struct e1000_hw *hw)
+               if (ret_val)
+                       goto out;
+-              index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+-                      M88E1000_PSSR_CABLE_LENGTH_SHIFT;
++              index = FIELD_GET(M88E1000_PSSR_CABLE_LENGTH, phy_data);
+               if (index >= ARRAY_SIZE(e1000_m88_cable_length_table) - 1) {
+                       ret_val = -E1000_ERR_PHY;
+                       goto out;
+@@ -2578,8 +2576,7 @@ s32 igb_get_cable_length_82580(struct e1000_hw *hw)
+       if (ret_val)
+               goto out;
+-      length = (phy_data & I82580_DSTATUS_CABLE_LENGTH) >>
+-               I82580_DSTATUS_CABLE_LENGTH_SHIFT;
++      length = FIELD_GET(I82580_DSTATUS_CABLE_LENGTH, phy_data);
+       if (length == E1000_CABLE_LENGTH_UNDEFINED)
+               ret_val = -E1000_ERR_PHY;
+diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c
+index 4ee849985e2b8..92b2be06a6e93 100644
+--- a/drivers/net/ethernet/intel/igb/igb_ethtool.c
++++ b/drivers/net/ethernet/intel/igb/igb_ethtool.c
+@@ -2434,7 +2434,7 @@ static int igb_get_ts_info(struct net_device *dev,
+       }
+ }
+-#define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
++#define ETHER_TYPE_FULL_MASK cpu_to_be16(FIELD_MAX(U16_MAX))
+ static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
+                                    struct ethtool_rxnfc *cmd)
+ {
+@@ -2733,8 +2733,8 @@ static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
+       u32 vlapqf;
+       vlapqf = rd32(E1000_VLAPQF);
+-      vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
+-                              >> VLAN_PRIO_SHIFT;
++      vlan_priority = FIELD_GET(VLAN_PRIO_MASK,
++                                ntohs(input->filter.vlan_tci));
+       queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
+       /* check whether this vlan prio is already set */
+@@ -2817,7 +2817,7 @@ static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
+       u8 vlan_priority;
+       u32 vlapqf;
+-      vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
++      vlan_priority = FIELD_GET(VLAN_PRIO_MASK, vlan_tci);
+       vlapqf = rd32(E1000_VLAPQF);
+       vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
+diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
+index 11921141b6079..4431e7693d45f 100644
+--- a/drivers/net/ethernet/intel/igb/igb_main.c
++++ b/drivers/net/ethernet/intel/igb/igb_main.c
+@@ -7283,7 +7283,7 @@ static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
+ static int igb_set_vf_multicasts(struct igb_adapter *adapter,
+                                 u32 *msgbuf, u32 vf)
+ {
+-      int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
++      int n = FIELD_GET(E1000_VT_MSGINFO_MASK, msgbuf[0]);
+       u16 *hash_list = (u16 *)&msgbuf[1];
+       struct vf_data_storage *vf_data = &adapter->vf_data[vf];
+       int i;
+@@ -7543,7 +7543,7 @@ static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
+ static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
+ {
+-      int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
++      int add = FIELD_GET(E1000_VT_MSGINFO_MASK, msgbuf[0]);
+       int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
+       int ret;
+diff --git a/drivers/net/ethernet/intel/igbvf/mbx.c b/drivers/net/ethernet/intel/igbvf/mbx.c
+index a3cd7ac48d4b6..d15282ee5ea8f 100644
+--- a/drivers/net/ethernet/intel/igbvf/mbx.c
++++ b/drivers/net/ethernet/intel/igbvf/mbx.c
+@@ -1,6 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /* Copyright(c) 2009 - 2018 Intel Corporation. */
++#include <linux/bitfield.h>
+ #include "mbx.h"
+ /**
+diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c
+index c748668bf2fce..c5012fa36af2f 100644
+--- a/drivers/net/ethernet/intel/igbvf/netdev.c
++++ b/drivers/net/ethernet/intel/igbvf/netdev.c
+@@ -273,9 +273,8 @@ static bool igbvf_clean_rx_irq(struct igbvf_adapter *adapter,
+                * that case, it fills the header buffer and spills the rest
+                * into the page.
+                */
+-              hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.hdr_info)
+-                     & E1000_RXDADV_HDRBUFLEN_MASK) >>
+-                     E1000_RXDADV_HDRBUFLEN_SHIFT;
++              hlen = le16_get_bits(rx_desc->wb.lower.lo_dword.hs_rss.hdr_info,
++                                   E1000_RXDADV_HDRBUFLEN_MASK);
+               if (hlen > adapter->rx_ps_hdr_size)
+                       hlen = adapter->rx_ps_hdr_size;
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+index b2a0f2aaa05be..2e6e0365154a1 100644
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+@@ -684,7 +684,7 @@ void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw)
+       u32 reg;
+       reg = IXGBE_READ_REG(hw, IXGBE_STATUS);
+-      bus->func = (reg & IXGBE_STATUS_LAN_ID) >> IXGBE_STATUS_LAN_ID_SHIFT;
++      bus->func = FIELD_GET(IXGBE_STATUS_LAN_ID, reg);
+       bus->lan_id = bus->func;
+       /* check for a port swap */
+@@ -695,8 +695,8 @@ void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw)
+       /* Get MAC instance from EEPROM for configuring CS4227 */
+       if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) {
+               hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4);
+-              bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >>
+-                                 IXGBE_EE_CTRL_4_INST_ID_SHIFT;
++              bus->instance_id = FIELD_GET(IXGBE_EE_CTRL_4_INST_ID,
++                                           ee_ctrl_4);
+       }
+ }
+@@ -870,10 +870,9 @@ s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw)
+                        * SPI EEPROM is assumed here.  This code would need to
+                        * change if a future EEPROM is not SPI.
+                        */
+-                      eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>
+-                                          IXGBE_EEC_SIZE_SHIFT);
++                      eeprom_size = FIELD_GET(IXGBE_EEC_SIZE, eec);
+                       eeprom->word_size = BIT(eeprom_size +
+-                                               IXGBE_EEPROM_WORD_SIZE_SHIFT);
++                                              IXGBE_EEPROM_WORD_SIZE_SHIFT);
+               }
+               if (eec & IXGBE_EEC_ADDR_SIZE)
+@@ -3935,10 +3934,10 @@ s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw)
+               if (status)
+                       return status;
+-              sensor_index = ((ets_sensor & IXGBE_ETS_DATA_INDEX_MASK) >>
+-                              IXGBE_ETS_DATA_INDEX_SHIFT);
+-              sensor_location = ((ets_sensor & IXGBE_ETS_DATA_LOC_MASK) >>
+-                                 IXGBE_ETS_DATA_LOC_SHIFT);
++              sensor_index = FIELD_GET(IXGBE_ETS_DATA_INDEX_MASK,
++                                       ets_sensor);
++              sensor_location = FIELD_GET(IXGBE_ETS_DATA_LOC_MASK,
++                                          ets_sensor);
+               if (sensor_location != 0) {
+                       status = hw->phy.ops.read_i2c_byte(hw,
+@@ -3982,8 +3981,7 @@ s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)
+       if (status)
+               return status;
+-      low_thresh_delta = ((ets_cfg & IXGBE_ETS_LTHRES_DELTA_MASK) >>
+-                           IXGBE_ETS_LTHRES_DELTA_SHIFT);
++      low_thresh_delta = FIELD_GET(IXGBE_ETS_LTHRES_DELTA_MASK, ets_cfg);
+       num_sensors = (ets_cfg & IXGBE_ETS_NUM_SENSORS_MASK);
+       if (num_sensors > IXGBE_MAX_SENSORS)
+               num_sensors = IXGBE_MAX_SENSORS;
+@@ -3997,10 +3995,10 @@ s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)
+                              ets_offset + 1 + i);
+                       continue;
+               }
+-              sensor_index = ((ets_sensor & IXGBE_ETS_DATA_INDEX_MASK) >>
+-                              IXGBE_ETS_DATA_INDEX_SHIFT);
+-              sensor_location = ((ets_sensor & IXGBE_ETS_DATA_LOC_MASK) >>
+-                                 IXGBE_ETS_DATA_LOC_SHIFT);
++              sensor_index = FIELD_GET(IXGBE_ETS_DATA_INDEX_MASK,
++                                       ets_sensor);
++              sensor_location = FIELD_GET(IXGBE_ETS_DATA_LOC_MASK,
++                                          ets_sensor);
+               therm_limit = ets_sensor & IXGBE_ETS_DATA_HTHRESH_MASK;
+               hw->phy.ops.write_i2c_byte(hw,
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+index cb23aad5953b0..f245f3df40fca 100644
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+@@ -11409,7 +11409,7 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
+       if ((pf_func & 1) == (pdev->devfn & 1)) {
+               unsigned int device_id;
+-              vf = (req_id & 0x7F) >> 1;
++              vf = FIELD_GET(0x7F, req_id);
+               e_dev_err("VF %d has caused a PCIe error\n", vf);
+               e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
+                               "%8.8x\tdw3: %8.8x\n",
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+index 930dc50719364..f28140a05f091 100644
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+@@ -276,9 +276,8 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
+               return 0;
+       if (hw->phy.nw_mng_if_sel) {
+-              phy_addr = (hw->phy.nw_mng_if_sel &
+-                          IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD) >>
+-                         IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT;
++              phy_addr = FIELD_GET(IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD,
++                                   hw->phy.nw_mng_if_sel);
+               if (ixgbe_probe_phy(hw, phy_addr))
+                       return 0;
+               else
+@@ -1447,8 +1446,7 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
+               ret_val = hw->eeprom.ops.read(hw, data_offset, &eword);
+               if (ret_val)
+                       goto err_eeprom;
+-              control = (eword & IXGBE_CONTROL_MASK_NL) >>
+-                         IXGBE_CONTROL_SHIFT_NL;
++              control = FIELD_GET(IXGBE_CONTROL_MASK_NL, eword);
+               edata = eword & IXGBE_DATA_MASK_NL;
+               switch (control) {
+               case IXGBE_DELAY_NL:
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+index 198ab9d97618c..d0a6c220a12ac 100644
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+@@ -363,8 +363,7 @@ int ixgbe_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
+ static int ixgbe_set_vf_multicasts(struct ixgbe_adapter *adapter,
+                                  u32 *msgbuf, u32 vf)
+ {
+-      int entries = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK)
+-                     >> IXGBE_VT_MSGINFO_SHIFT;
++      int entries = FIELD_GET(IXGBE_VT_MSGINFO_MASK, msgbuf[0]);
+       u16 *hash_list = (u16 *)&msgbuf[1];
+       struct vf_data_storage *vfinfo = &adapter->vfinfo[vf];
+       struct ixgbe_hw *hw = &adapter->hw;
+@@ -971,7 +970,7 @@ static int ixgbe_set_vf_mac_addr(struct ixgbe_adapter *adapter,
+ static int ixgbe_set_vf_vlan_msg(struct ixgbe_adapter *adapter,
+                                u32 *msgbuf, u32 vf)
+ {
+-      u32 add = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT;
++      u32 add = FIELD_GET(IXGBE_VT_MSGINFO_MASK, msgbuf[0]);
+       u32 vid = (msgbuf[1] & IXGBE_VLVF_VLANID_MASK);
+       u8 tcs = adapter->hw_tcs;
+@@ -994,8 +993,7 @@ static int ixgbe_set_vf_macvlan_msg(struct ixgbe_adapter *adapter,
+                                   u32 *msgbuf, u32 vf)
+ {
+       u8 *new_mac = ((u8 *)(&msgbuf[1]));
+-      int index = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >>
+-                  IXGBE_VT_MSGINFO_SHIFT;
++      int index = FIELD_GET(IXGBE_VT_MSGINFO_MASK, msgbuf[0]);
+       int err;
+       if (adapter->vfinfo[vf].pf_set_mac && !adapter->vfinfo[vf].trusted &&
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
+index 15325c549d9b5..57a912e4653fc 100644
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
+@@ -187,16 +187,16 @@ s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw)
+ s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
+ {
+       struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
+-      u32 eec;
+-      u16 eeprom_size;
+       if (eeprom->type == ixgbe_eeprom_uninitialized) {
++              u16 eeprom_size;
++              u32 eec;
++
+               eeprom->semaphore_delay = 10;
+               eeprom->type = ixgbe_flash;
+               eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
+-              eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>
+-                                  IXGBE_EEC_SIZE_SHIFT);
++              eeprom_size = FIELD_GET(IXGBE_EEC_SIZE, eec);
+               eeprom->word_size = BIT(eeprom_size +
+                                       IXGBE_EEPROM_WORD_SIZE_SHIFT);
+diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c
+index cdc912bba8089..c1adc94a5a657 100644
+--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c
++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c
+@@ -630,16 +630,16 @@ static s32 ixgbe_fc_autoneg_fw(struct ixgbe_hw *hw)
+ static s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw)
+ {
+       struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
+-      u32 eec;
+-      u16 eeprom_size;
+       if (eeprom->type == ixgbe_eeprom_uninitialized) {
++              u16 eeprom_size;
++              u32 eec;
++
+               eeprom->semaphore_delay = 10;
+               eeprom->type = ixgbe_flash;
+               eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
+-              eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>
+-                                  IXGBE_EEC_SIZE_SHIFT);
++              eeprom_size = FIELD_GET(IXGBE_EEC_SIZE, eec);
+               eeprom->word_size = BIT(eeprom_size +
+                                       IXGBE_EEPROM_WORD_SIZE_SHIFT);
+@@ -714,8 +714,7 @@ static s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
+       ret = ixgbe_iosf_wait(hw, &command);
+       if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
+-              error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
+-                       IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT;
++              error = FIELD_GET(IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK, command);
+               hw_dbg(hw, "Failed to read, error %x\n", error);
+               ret = -EIO;
+               goto out;
+@@ -1415,8 +1414,7 @@ static s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
+       ret = ixgbe_iosf_wait(hw, &command);
+       if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
+-              error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
+-                       IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT;
++              error = FIELD_GET(IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK, command);
+               hw_dbg(hw, "Failed to write, error %x\n", error);
+               return -EIO;
+       }
+@@ -3229,9 +3227,8 @@ static void ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw)
+        */
+       if (hw->mac.type == ixgbe_mac_x550em_a &&
+           hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_MDIO_ACT) {
+-              hw->phy.mdio.prtad = (hw->phy.nw_mng_if_sel &
+-                                    IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD) >>
+-                                   IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT;
++              hw->phy.mdio.prtad = FIELD_GET(IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD,
++                                             hw->phy.nw_mng_if_sel);
+       }
+ }
+-- 
+2.43.0
+
diff --git a/queue-6.6/kvm-svm-add-support-for-allowing-zero-sev-asids.patch b/queue-6.6/kvm-svm-add-support-for-allowing-zero-sev-asids.patch
new file mode 100644 (file)
index 0000000..f25318b
--- /dev/null
@@ -0,0 +1,102 @@
+From 0202c1d64303b5c4f85e0358008fc049d3df5bb0 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 31 Jan 2024 15:56:08 -0800
+Subject: KVM: SVM: Add support for allowing zero SEV ASIDs
+
+From: Ashish Kalra <ashish.kalra@amd.com>
+
+[ Upstream commit 0aa6b90ef9d75b4bd7b6d106d85f2a3437697f91 ]
+
+Some BIOSes allow the end user to set the minimum SEV ASID value
+(CPUID 0x8000001F_EDX) to be greater than the maximum number of
+encrypted guests, or maximum SEV ASID value (CPUID 0x8000001F_ECX)
+in order to dedicate all the SEV ASIDs to SEV-ES or SEV-SNP.
+
+The SEV support, as coded, does not handle the case where the minimum
+SEV ASID value can be greater than the maximum SEV ASID value.
+As a result, the following confusing message is issued:
+
+[   30.715724] kvm_amd: SEV enabled (ASIDs 1007 - 1006)
+
+Fix the support to properly handle this case.
+
+Fixes: 916391a2d1dc ("KVM: SVM: Add support for SEV-ES capability in KVM")
+Suggested-by: Sean Christopherson <seanjc@google.com>
+Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
+Cc: stable@vger.kernel.org
+Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
+Link: https://lore.kernel.org/r/20240104190520.62510-1-Ashish.Kalra@amd.com
+Link: https://lore.kernel.org/r/20240131235609.4161407-4-seanjc@google.com
+Signed-off-by: Sean Christopherson <seanjc@google.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kvm/svm/sev.c | 29 +++++++++++++++++++----------
+ 1 file changed, 19 insertions(+), 10 deletions(-)
+
+diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
+index ea68a08cc89c2..c5845f31c34dc 100644
+--- a/arch/x86/kvm/svm/sev.c
++++ b/arch/x86/kvm/svm/sev.c
+@@ -144,10 +144,21 @@ static void sev_misc_cg_uncharge(struct kvm_sev_info *sev)
+ static int sev_asid_new(struct kvm_sev_info *sev)
+ {
+-      unsigned int asid, min_asid, max_asid;
++      /*
++       * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid.
++       * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1.
++       * Note: min ASID can end up larger than the max if basic SEV support is
++       * effectively disabled by disallowing use of ASIDs for SEV guests.
++       */
++      unsigned int min_asid = sev->es_active ? 1 : min_sev_asid;
++      unsigned int max_asid = sev->es_active ? min_sev_asid - 1 : max_sev_asid;
++      unsigned int asid;
+       bool retry = true;
+       int ret;
++      if (min_asid > max_asid)
++              return -ENOTTY;
++
+       WARN_ON(sev->misc_cg);
+       sev->misc_cg = get_current_misc_cg();
+       ret = sev_misc_cg_try_charge(sev);
+@@ -159,12 +170,6 @@ static int sev_asid_new(struct kvm_sev_info *sev)
+       mutex_lock(&sev_bitmap_lock);
+-      /*
+-       * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid.
+-       * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1.
+-       */
+-      min_asid = sev->es_active ? 1 : min_sev_asid;
+-      max_asid = sev->es_active ? min_sev_asid - 1 : max_sev_asid;
+ again:
+       asid = find_next_zero_bit(sev_asid_bitmap, max_asid + 1, min_asid);
+       if (asid > max_asid) {
+@@ -2236,8 +2241,10 @@ void __init sev_hardware_setup(void)
+               goto out;
+       }
+-      sev_asid_count = max_sev_asid - min_sev_asid + 1;
+-      WARN_ON_ONCE(misc_cg_set_capacity(MISC_CG_RES_SEV, sev_asid_count));
++      if (min_sev_asid <= max_sev_asid) {
++              sev_asid_count = max_sev_asid - min_sev_asid + 1;
++              WARN_ON_ONCE(misc_cg_set_capacity(MISC_CG_RES_SEV, sev_asid_count));
++      }
+       sev_supported = true;
+       /* SEV-ES support requested? */
+@@ -2268,7 +2275,9 @@ void __init sev_hardware_setup(void)
+ out:
+       if (boot_cpu_has(X86_FEATURE_SEV))
+               pr_info("SEV %s (ASIDs %u - %u)\n",
+-                      sev_supported ? "enabled" : "disabled",
++                      sev_supported ? min_sev_asid <= max_sev_asid ? "enabled" :
++                                                                     "unusable" :
++                                                                     "disabled",
+                       min_sev_asid, max_sev_asid);
+       if (boot_cpu_has(X86_FEATURE_SEV_ES))
+               pr_info("SEV-ES %s (ASIDs %u - %u)\n",
+-- 
+2.43.0
+
diff --git a/queue-6.6/kvm-svm-use-unsigned-integers-when-dealing-with-asid.patch b/queue-6.6/kvm-svm-use-unsigned-integers-when-dealing-with-asid.patch
new file mode 100644 (file)
index 0000000..4ed00bc
--- /dev/null
@@ -0,0 +1,139 @@
+From e858aad3ddcaa8a3c512c65c11dd9f20117febaa Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 31 Jan 2024 15:56:07 -0800
+Subject: KVM: SVM: Use unsigned integers when dealing with ASIDs
+
+From: Sean Christopherson <seanjc@google.com>
+
+[ Upstream commit 466eec4a22a76c462781bf6d45cb02cbedf21a61 ]
+
+Convert all local ASID variables and parameters throughout the SEV code
+from signed integers to unsigned integers.  As ASIDs are fundamentally
+unsigned values, and the global min/max variables are appropriately
+unsigned integers, too.
+
+Functionally, this is a glorified nop as KVM guarantees min_sev_asid is
+non-zero, and no CPU supports -1u as the _only_ asid, i.e. the signed vs.
+unsigned goof won't cause problems in practice.
+
+Opportunistically use sev_get_asid() in sev_flush_encrypted_page() instead
+of open coding an equivalent.
+
+Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
+Link: https://lore.kernel.org/r/20240131235609.4161407-3-seanjc@google.com
+Signed-off-by: Sean Christopherson <seanjc@google.com>
+Stable-dep-of: 0aa6b90ef9d7 ("KVM: SVM: Add support for allowing zero SEV ASIDs")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kvm/svm/sev.c | 18 ++++++++++--------
+ arch/x86/kvm/trace.h   | 10 +++++-----
+ 2 files changed, 15 insertions(+), 13 deletions(-)
+
+diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
+index e86231c3b8a54..ea68a08cc89c2 100644
+--- a/arch/x86/kvm/svm/sev.c
++++ b/arch/x86/kvm/svm/sev.c
+@@ -84,9 +84,10 @@ struct enc_region {
+ };
+ /* Called with the sev_bitmap_lock held, or on shutdown  */
+-static int sev_flush_asids(int min_asid, int max_asid)
++static int sev_flush_asids(unsigned int min_asid, unsigned int max_asid)
+ {
+-      int ret, asid, error = 0;
++      int ret, error = 0;
++      unsigned int asid;
+       /* Check if there are any ASIDs to reclaim before performing a flush */
+       asid = find_next_bit(sev_reclaim_asid_bitmap, nr_asids, min_asid);
+@@ -116,7 +117,7 @@ static inline bool is_mirroring_enc_context(struct kvm *kvm)
+ }
+ /* Must be called with the sev_bitmap_lock held */
+-static bool __sev_recycle_asids(int min_asid, int max_asid)
++static bool __sev_recycle_asids(unsigned int min_asid, unsigned int max_asid)
+ {
+       if (sev_flush_asids(min_asid, max_asid))
+               return false;
+@@ -143,8 +144,9 @@ static void sev_misc_cg_uncharge(struct kvm_sev_info *sev)
+ static int sev_asid_new(struct kvm_sev_info *sev)
+ {
+-      int asid, min_asid, max_asid, ret;
++      unsigned int asid, min_asid, max_asid;
+       bool retry = true;
++      int ret;
+       WARN_ON(sev->misc_cg);
+       sev->misc_cg = get_current_misc_cg();
+@@ -187,7 +189,7 @@ static int sev_asid_new(struct kvm_sev_info *sev)
+       return ret;
+ }
+-static int sev_get_asid(struct kvm *kvm)
++static unsigned int sev_get_asid(struct kvm *kvm)
+ {
+       struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
+@@ -284,8 +286,8 @@ static int sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp)
+ static int sev_bind_asid(struct kvm *kvm, unsigned int handle, int *error)
+ {
++      unsigned int asid = sev_get_asid(kvm);
+       struct sev_data_activate activate;
+-      int asid = sev_get_asid(kvm);
+       int ret;
+       /* activate ASID on the given handle */
+@@ -2314,7 +2316,7 @@ int sev_cpu_init(struct svm_cpu_data *sd)
+  */
+ static void sev_flush_encrypted_page(struct kvm_vcpu *vcpu, void *va)
+ {
+-      int asid = to_kvm_svm(vcpu->kvm)->sev_info.asid;
++      unsigned int asid = sev_get_asid(vcpu->kvm);
+       /*
+        * Note!  The address must be a kernel address, as regular page walk
+@@ -2632,7 +2634,7 @@ void sev_es_unmap_ghcb(struct vcpu_svm *svm)
+ void pre_sev_run(struct vcpu_svm *svm, int cpu)
+ {
+       struct svm_cpu_data *sd = per_cpu_ptr(&svm_data, cpu);
+-      int asid = sev_get_asid(svm->vcpu.kvm);
++      unsigned int asid = sev_get_asid(svm->vcpu.kvm);
+       /* Assign the asid allocated with this SEV guest */
+       svm->asid = asid;
+diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h
+index 83843379813ee..b82e6ed4f0241 100644
+--- a/arch/x86/kvm/trace.h
++++ b/arch/x86/kvm/trace.h
+@@ -732,13 +732,13 @@ TRACE_EVENT(kvm_nested_intr_vmexit,
+  * Tracepoint for nested #vmexit because of interrupt pending
+  */
+ TRACE_EVENT(kvm_invlpga,
+-          TP_PROTO(__u64 rip, int asid, u64 address),
++          TP_PROTO(__u64 rip, unsigned int asid, u64 address),
+           TP_ARGS(rip, asid, address),
+       TP_STRUCT__entry(
+-              __field(        __u64,  rip     )
+-              __field(        int,    asid    )
+-              __field(        __u64,  address )
++              __field(        __u64,          rip     )
++              __field(        unsigned int,   asid    )
++              __field(        __u64,          address )
+       ),
+       TP_fast_assign(
+@@ -747,7 +747,7 @@ TRACE_EVENT(kvm_invlpga,
+               __entry->address        =       address;
+       ),
+-      TP_printk("rip: 0x%016llx asid: %d address: 0x%016llx",
++      TP_printk("rip: 0x%016llx asid: %u address: 0x%016llx",
+                 __entry->rip, __entry->asid, __entry->address)
+ );
+-- 
+2.43.0
+
diff --git a/queue-6.6/net-ravb-always-process-tx-descriptor-ring.patch b/queue-6.6/net-ravb-always-process-tx-descriptor-ring.patch
new file mode 100644 (file)
index 0000000..45eeb12
--- /dev/null
@@ -0,0 +1,55 @@
+From 3cf1fec3a3cf24eb22bd8136e2214736d2ca22ed Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 2 Apr 2024 15:53:04 +0100
+Subject: net: ravb: Always process TX descriptor ring
+
+From: Paul Barker <paul.barker.ct@bp.renesas.com>
+
+[ Upstream commit 596a4254915f94c927217fe09c33a6828f33fb25 ]
+
+The TX queue should be serviced each time the poll function is called,
+even if the full RX work budget has been consumed. This prevents
+starvation of the TX queue when RX bandwidth usage is high.
+
+Fixes: c156633f1353 ("Renesas Ethernet AVB driver proper")
+Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
+Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
+Link: https://lore.kernel.org/r/20240402145305.82148-1-paul.barker.ct@bp.renesas.com
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index b87e9252ea176..14595d23b1903 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -1292,12 +1292,12 @@ static int ravb_poll(struct napi_struct *napi, int budget)
+       int q = napi - priv->napi;
+       int mask = BIT(q);
+       int quota = budget;
++      bool unmask;
+       /* Processing RX Descriptor Ring */
+       /* Clear RX interrupt */
+       ravb_write(ndev, ~(mask | RIS0_RESERVED), RIS0);
+-      if (ravb_rx(ndev, &quota, q))
+-              goto out;
++      unmask = !ravb_rx(ndev, &quota, q);
+       /* Processing TX Descriptor Ring */
+       spin_lock_irqsave(&priv->lock, flags);
+@@ -1307,6 +1307,9 @@ static int ravb_poll(struct napi_struct *napi, int budget)
+       netif_wake_subqueue(ndev, q);
+       spin_unlock_irqrestore(&priv->lock, flags);
++      if (!unmask)
++              goto out;
++
+       napi_complete(napi);
+       /* Re-enable RX/TX interrupts */
+-- 
+2.43.0
+
diff --git a/queue-6.6/net-ravb-always-update-error-counters.patch b/queue-6.6/net-ravb-always-update-error-counters.patch
new file mode 100644 (file)
index 0000000..d29fea7
--- /dev/null
@@ -0,0 +1,66 @@
+From f14b03aca18d32e65d2bb0bba8a950de59b8dcf4 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 2 Apr 2024 15:53:05 +0100
+Subject: net: ravb: Always update error counters
+
+From: Paul Barker <paul.barker.ct@bp.renesas.com>
+
+[ Upstream commit 101b76418d7163240bc74a7e06867dca0e51183e ]
+
+The error statistics should be updated each time the poll function is
+called, even if the full RX work budget has been consumed. This prevents
+the counts from becoming stuck when RX bandwidth usage is high.
+
+This also ensures that error counters are not updated after we've
+re-enabled interrupts as that could result in a race condition.
+
+Also drop an unnecessary space.
+
+Fixes: c156633f1353 ("Renesas Ethernet AVB driver proper")
+Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
+Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
+Link: https://lore.kernel.org/r/20240402145305.82148-2-paul.barker.ct@bp.renesas.com
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 14595d23b1903..c6897e6ea362d 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -1307,6 +1307,15 @@ static int ravb_poll(struct napi_struct *napi, int budget)
+       netif_wake_subqueue(ndev, q);
+       spin_unlock_irqrestore(&priv->lock, flags);
++      /* Receive error message handling */
++      priv->rx_over_errors = priv->stats[RAVB_BE].rx_over_errors;
++      if (info->nc_queues)
++              priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors;
++      if (priv->rx_over_errors != ndev->stats.rx_over_errors)
++              ndev->stats.rx_over_errors = priv->rx_over_errors;
++      if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors)
++              ndev->stats.rx_fifo_errors = priv->rx_fifo_errors;
++
+       if (!unmask)
+               goto out;
+@@ -1323,14 +1332,6 @@ static int ravb_poll(struct napi_struct *napi, int budget)
+       }
+       spin_unlock_irqrestore(&priv->lock, flags);
+-      /* Receive error message handling */
+-      priv->rx_over_errors =  priv->stats[RAVB_BE].rx_over_errors;
+-      if (info->nc_queues)
+-              priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors;
+-      if (priv->rx_over_errors != ndev->stats.rx_over_errors)
+-              ndev->stats.rx_over_errors = priv->rx_over_errors;
+-      if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors)
+-              ndev->stats.rx_fifo_errors = priv->rx_fifo_errors;
+ out:
+       return budget - quota;
+ }
+-- 
+2.43.0
+
diff --git a/queue-6.6/net-ravb-let-ip-specific-receive-function-to-interro.patch b/queue-6.6/net-ravb-let-ip-specific-receive-function-to-interro.patch
new file mode 100644 (file)
index 0000000..1ecfb5f
--- /dev/null
@@ -0,0 +1,63 @@
+From 569935a575dfc3a49adb4c9929cb8b4f169b4013 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 2 Feb 2024 10:41:22 +0200
+Subject: net: ravb: Let IP-specific receive function to interrogate
+ descriptors
+
+From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
+
+[ Upstream commit 2b993bfdb47b3aaafd8fe9cd5038b5e297b18ee1 ]
+
+ravb_poll() initial code used to interrogate the first descriptor of the
+RX queue in case gPTP is false to determine if ravb_rx() should be called.
+This is done for non-gPTP IPs. For gPTP IPs the driver PTP-specific
+information was used to determine if receive function should be called. As
+every IP has its own receive function that interrogates the RX descriptors
+list in the same way the ravb_poll() was doing there is no need to double
+check this in ravb_poll(). Removing the code from ravb_poll() leads to a
+cleaner code.
+
+Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
+Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Stable-dep-of: 596a4254915f ("net: ravb: Always process TX descriptor ring")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 13 ++-----------
+ 1 file changed, 2 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 8fec0dbbbe7bb..b87e9252ea176 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -1288,25 +1288,16 @@ static int ravb_poll(struct napi_struct *napi, int budget)
+       struct net_device *ndev = napi->dev;
+       struct ravb_private *priv = netdev_priv(ndev);
+       const struct ravb_hw_info *info = priv->info;
+-      bool gptp = info->gptp || info->ccc_gac;
+-      struct ravb_rx_desc *desc;
+       unsigned long flags;
+       int q = napi - priv->napi;
+       int mask = BIT(q);
+       int quota = budget;
+-      unsigned int entry;
+-      if (!gptp) {
+-              entry = priv->cur_rx[q] % priv->num_rx_ring[q];
+-              desc = &priv->gbeth_rx_ring[entry];
+-      }
+       /* Processing RX Descriptor Ring */
+       /* Clear RX interrupt */
+       ravb_write(ndev, ~(mask | RIS0_RESERVED), RIS0);
+-      if (gptp || desc->die_dt != DT_FEMPTY) {
+-              if (ravb_rx(ndev, &quota, q))
+-                      goto out;
+-      }
++      if (ravb_rx(ndev, &quota, q))
++              goto out;
+       /* Processing TX Descriptor Ring */
+       spin_lock_irqsave(&priv->lock, flags);
+-- 
+2.43.0
+
diff --git a/queue-6.6/scsi-sg-avoid-sg-device-teardown-race.patch b/queue-6.6/scsi-sg-avoid-sg-device-teardown-race.patch
new file mode 100644 (file)
index 0000000..0b16b1e
--- /dev/null
@@ -0,0 +1,56 @@
+From 735728cdaa3444338a870da6701fa0e8b82b9c88 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 20 Mar 2024 22:30:32 +0100
+Subject: scsi: sg: Avoid sg device teardown race
+
+From: Alexander Wetzel <Alexander@wetzel-home.de>
+
+[ Upstream commit 27f58c04a8f438078583041468ec60597841284d ]
+
+sg_remove_sfp_usercontext() must not use sg_device_destroy() after calling
+scsi_device_put().
+
+sg_device_destroy() is accessing the parent scsi_device request_queue which
+will already be set to NULL when the preceding call to scsi_device_put()
+removed the last reference to the parent scsi_device.
+
+The resulting NULL pointer exception will then crash the kernel.
+
+Link: https://lore.kernel.org/r/20240305150509.23896-1-Alexander@wetzel-home.de
+Fixes: db59133e9279 ("scsi: sg: fix blktrace debugfs entries leakage")
+Cc: stable@vger.kernel.org
+Signed-off-by: Alexander Wetzel <Alexander@wetzel-home.de>
+Link: https://lore.kernel.org/r/20240320213032.18221-1-Alexander@wetzel-home.de
+Reviewed-by: Bart Van Assche <bvanassche@acm.org>
+Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/scsi/sg.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
+index 0d8afffd1683b..8bd95ee1825a6 100644
+--- a/drivers/scsi/sg.c
++++ b/drivers/scsi/sg.c
+@@ -2208,6 +2208,7 @@ sg_remove_sfp_usercontext(struct work_struct *work)
+ {
+       struct sg_fd *sfp = container_of(work, struct sg_fd, ew.work);
+       struct sg_device *sdp = sfp->parentdp;
++      struct scsi_device *device = sdp->device;
+       Sg_request *srp;
+       unsigned long iflags;
+@@ -2233,8 +2234,9 @@ sg_remove_sfp_usercontext(struct work_struct *work)
+                       "sg_remove_sfp: sfp=0x%p\n", sfp));
+       kfree(sfp);
+-      scsi_device_put(sdp->device);
++      WARN_ON_ONCE(kref_read(&sdp->d_ref) != 1);
+       kref_put(&sdp->d_ref, sg_device_destroy);
++      scsi_device_put(device);
+       module_put(THIS_MODULE);
+ }
+-- 
+2.43.0
+
index 7cbea35c67d18d123e06fc896b63186ce1d97c5f..261d1636f2c4b46d84816655f9169c7b72c35030 100644 (file)
@@ -128,3 +128,30 @@ octeontx2-pf-check-negative-error-code-in-otx2_open.patch
 octeontx2-af-add-array-index-check.patch
 i40e-fix-i40e_count_filters-to-count-only-active-new-filters.patch
 i40e-fix-vf-may-be-used-uninitialized-in-this-function-warning.patch
+scsi-sg-avoid-sg-device-teardown-race.patch
+usb-typec-ucsi-fix-race-between-typec_switch-and-rol.patch
+usb-typec-ucsi-check-for-notifications-after-init.patch
+drm-amd-display-fix-dpstream-clk-on-and-off-sequence.patch
+drm-amd-display-prevent-crash-when-disable-stream.patch
+drm-amd-evict-resources-during-pm-ops-prepare-callba.patch
+drm-amd-add-concept-of-running-prepare_suspend-seque.patch
+drm-amd-flush-gfxoff-requests-in-prepare-stage.patch
+i40e-remove-_t-suffix-from-enum-type-names.patch
+i40e-enforce-software-interrupt-during-busy-poll-exi.patch
+i40e-remove-back-pointer-from-i40e_hw-structure.patch
+i40e-refactor-i40e_mdio_clause-macros.patch
+virtchnl-add-header-dependencies.patch
+i40e-simplify-memory-allocation-functions.patch
+i40e-move-memory-allocation-structures-to-i40e_alloc.patch
+i40e-split-i40e_osdep.h.patch
+i40e-remove-circular-header-dependencies-and-fix-hea.patch
+intel-add-bit-macro-includes-where-needed.patch
+intel-legacy-field-get-conversion.patch
+e1000e-workaround-for-sporadic-mdi-error-on-meteor-l.patch
+e1000e-minor-flow-correction-in-e1000_shutdown-funct.patch
+e1000e-move-force-smbus-from-enable-ulp-function-to-.patch
+net-ravb-let-ip-specific-receive-function-to-interro.patch
+net-ravb-always-process-tx-descriptor-ring.patch
+net-ravb-always-update-error-counters.patch
+kvm-svm-use-unsigned-integers-when-dealing-with-asid.patch
+kvm-svm-add-support-for-allowing-zero-sev-asids.patch
diff --git a/queue-6.6/usb-typec-ucsi-check-for-notifications-after-init.patch b/queue-6.6/usb-typec-ucsi-check-for-notifications-after-init.patch
new file mode 100644 (file)
index 0000000..867b2b3
--- /dev/null
@@ -0,0 +1,70 @@
+From 4ad0eedd5be3b953ad7281ca95696ff2bc82308c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 20 Mar 2024 08:39:23 +0100
+Subject: usb: typec: ucsi: Check for notifications after init
+
+From: Christian A. Ehrhardt <lk@c--e.de>
+
+[ Upstream commit 808a8b9e0b87bbc72bcc1f7ddfe5d04746e7ce56 ]
+
+The completion notification for the final SET_NOTIFICATION_ENABLE
+command during initialization can include a connector change
+notification.  However, at the time this completion notification is
+processed, the ucsi struct is not ready to handle this notification.
+As a result the notification is ignored and the controller
+never sends an interrupt again.
+
+Re-check CCI for a pending connector state change after
+initialization is complete. Adjust the corresponding debug
+message accordingly.
+
+Fixes: 71a1fa0df2a3 ("usb: typec: ucsi: Store the notification mask")
+Cc: stable@vger.kernel.org
+Signed-off-by: Christian A. Ehrhardt <lk@c--e.de>
+Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
+Link: https://lore.kernel.org/r/20240320073927.1641788-3-lk@c--e.de
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/usb/typec/ucsi/ucsi.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/usb/typec/ucsi/ucsi.c b/drivers/usb/typec/ucsi/ucsi.c
+index 70d9f4eebf1a7..15fbadaca55b1 100644
+--- a/drivers/usb/typec/ucsi/ucsi.c
++++ b/drivers/usb/typec/ucsi/ucsi.c
+@@ -959,7 +959,7 @@ void ucsi_connector_change(struct ucsi *ucsi, u8 num)
+       struct ucsi_connector *con = &ucsi->connector[num - 1];
+       if (!(ucsi->ntfy & UCSI_ENABLE_NTFY_CONNECTOR_CHANGE)) {
+-              dev_dbg(ucsi->dev, "Bogus connector change event\n");
++              dev_dbg(ucsi->dev, "Early connector change event\n");
+               return;
+       }
+@@ -1390,6 +1390,7 @@ static int ucsi_init(struct ucsi *ucsi)
+ {
+       struct ucsi_connector *con, *connector;
+       u64 command, ntfy;
++      u32 cci;
+       int ret;
+       int i;
+@@ -1442,6 +1443,13 @@ static int ucsi_init(struct ucsi *ucsi)
+       ucsi->connector = connector;
+       ucsi->ntfy = ntfy;
++
++      ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci));
++      if (ret)
++              return ret;
++      if (UCSI_CCI_CONNECTOR(READ_ONCE(cci)))
++              ucsi_connector_change(ucsi, cci);
++
+       return 0;
+ err_unregister:
+-- 
+2.43.0
+
diff --git a/queue-6.6/usb-typec-ucsi-fix-race-between-typec_switch-and-rol.patch b/queue-6.6/usb-typec-ucsi-fix-race-between-typec_switch-and-rol.patch
new file mode 100644 (file)
index 0000000..d99bfff
--- /dev/null
@@ -0,0 +1,99 @@
+From 222b5f39b0fe07ab66466c8449150bc76fa04908 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 1 Mar 2024 09:39:14 +0530
+Subject: usb: typec: ucsi: Fix race between typec_switch and role_switch
+
+From: Krishna Kurapati <quic_kriskura@quicinc.com>
+
+[ Upstream commit f5e9bda03aa50ffad36eccafe893d004ef213c43 ]
+
+When orientation switch is enabled in ucsi glink, there is a xhci
+probe failure seen when booting up in host mode in reverse
+orientation.
+
+During bootup the following things happen in multiple drivers:
+
+a) DWC3 controller driver initializes the core in device mode when the
+dr_mode is set to DRD. It relies on role_switch call to change role to
+host.
+
+b) QMP driver initializes the lanes to TYPEC_ORIENTATION_NORMAL as a
+normal routine. It relies on the typec_switch_set call to get notified
+of orientation changes.
+
+c) UCSI core reads the UCSI_GET_CONNECTOR_STATUS via the glink and
+provides initial role switch to dwc3 controller.
+
+When booting up in host mode with orientation TYPEC_ORIENTATION_REVERSE,
+then we see the following things happening in order:
+
+a) UCSI gives initial role as host to dwc3 controller ucsi_register_port.
+Upon receiving this notification, the dwc3 core needs to program GCTL from
+PRTCAP_DEVICE to PRTCAP_HOST and as part of this change, it asserts GCTL
+Core soft reset and waits for it to be  completed before shifting it to
+host. Only after the reset is done will the dwc3_host_init be invoked and
+xhci is probed. DWC3 controller expects that the usb phy's are stable
+during this process i.e., the phy init is already done.
+
+b) During the 100ms wait for GCTL core soft reset, the actual notification
+from PPM is received by ucsi_glink via pmic glink for changing role to
+host. The pmic_glink_ucsi_notify routine first sends the orientation
+change to QMP and then sends role to dwc3 via ucsi framework. This is
+happening exactly at the time GCTL core soft reset is being processed.
+
+c) When QMP driver receives typec switch to TYPEC_ORIENTATION_REVERSE, it
+then re-programs the phy at the instant GCTL core soft reset has been
+asserted by dwc3 controller due to which the QMP PLL lock fails in
+qmp_combo_usb_power_on.
+
+d) After the 100ms of GCTL core soft reset is completed, the dwc3 core
+goes for initializing the host mode and invokes xhci probe. But at this
+point the QMP is non-responsive and as a result, the xhci plat probe fails
+during xhci_reset.
+
+Fix this by passing orientation switch to available ucsi instances if
+their gpio configuration is available before ucsi_register is invoked so
+that by the time, the pmic_glink_ucsi_notify provides typec_switch to QMP,
+the lane is already configured and the call would be a NOP thus not racing
+with role switch.
+
+Cc: stable@vger.kernel.org
+Fixes: c6165ed2f425 ("usb: ucsi: glink: use the connector orientation GPIO to provide switch events")
+Suggested-by: Wesley Cheng <quic_wcheng@quicinc.com>
+Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
+Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+Link: https://lore.kernel.org/r/20240301040914.458492-1-quic_kriskura@quicinc.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/usb/typec/ucsi/ucsi_glink.c | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
+index 4853141cd10c8..894622b6556a6 100644
+--- a/drivers/usb/typec/ucsi/ucsi_glink.c
++++ b/drivers/usb/typec/ucsi/ucsi_glink.c
+@@ -254,6 +254,20 @@ static void pmic_glink_ucsi_notify(struct work_struct *work)
+ static void pmic_glink_ucsi_register(struct work_struct *work)
+ {
+       struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work);
++      int orientation;
++      int i;
++
++      for (i = 0; i < PMIC_GLINK_MAX_PORTS; i++) {
++              if (!ucsi->port_orientation[i])
++                      continue;
++              orientation = gpiod_get_value(ucsi->port_orientation[i]);
++
++              if (orientation >= 0) {
++                      typec_switch_set(ucsi->port_switch[i],
++                                       orientation ? TYPEC_ORIENTATION_REVERSE
++                                           : TYPEC_ORIENTATION_NORMAL);
++              }
++      }
+       ucsi_register(ucsi->ucsi);
+ }
+-- 
+2.43.0
+
diff --git a/queue-6.6/virtchnl-add-header-dependencies.patch b/queue-6.6/virtchnl-add-header-dependencies.patch
new file mode 100644 (file)
index 0000000..94a2fcf
--- /dev/null
@@ -0,0 +1,42 @@
+From baa30c45af2f0a63710a9f0a723c3edd6d4d9295 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 27 Sep 2023 10:31:30 +0200
+Subject: virtchnl: Add header dependencies
+
+From: Ivan Vecera <ivecera@redhat.com>
+
+[ Upstream commit 7151d87a175c6618fe81705755eb3dc4199cad4e ]
+
+The <linux/avf/virtchnl.h> uses BIT, struct_size and ETH_ALEN macros
+but does not include appropriate header files that defines them.
+Add these dependencies so this header file can be included anywhere.
+
+Signed-off-by: Ivan Vecera <ivecera@redhat.com>
+Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
+Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
+Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
+Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
+Stable-dep-of: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ include/linux/avf/virtchnl.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/include/linux/avf/virtchnl.h b/include/linux/avf/virtchnl.h
+index d0807ad43f933..6424aa06fb08d 100644
+--- a/include/linux/avf/virtchnl.h
++++ b/include/linux/avf/virtchnl.h
+@@ -4,6 +4,10 @@
+ #ifndef _VIRTCHNL_H_
+ #define _VIRTCHNL_H_
++#include <linux/bitops.h>
++#include <linux/overflow.h>
++#include <uapi/linux/if_ether.h>
++
+ /* Description:
+  * This header file describes the Virtual Function (VF) - Physical Function
+  * (PF) communication protocol used by the drivers for all devices starting
+-- 
+2.43.0
+