Commit
4c4e17f27013 ("clk: amlogic: naming consistency alignment")
refactored some internals in the g12a meson clock driver. Unfortunately
it introduced a bug in the clock init data, which results in the
following kernel panic:
Unable to handle kernel NULL pointer dereference at virtual address
0000000000000000
Mem abort info:
...
Data abort info:
...
[
0000000000000000] user address but active_mm is swapper
Internal error: Oops:
0000000096000004 [#1] SMP
Modules linked in:
CPU: 4 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.17.0-rc1+ #11158 PREEMPT
Hardware name: Hardkernel ODROID-N2 (DT)
pstate:
60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : __clk_register+0x60/0x92c
lr : __clk_register+0x48/0x92c
...
Call trace:
__clk_register+0x60/0x92c (P)
devm_clk_hw_register+0x5c/0xd8
meson_eeclkc_probe+0x74/0x110
g12a_clkc_probe+0x2c/0x58
platform_probe+0x5c/0xac
really_probe+0xbc/0x298
__driver_probe_device+0x78/0x12c
driver_probe_device+0xdc/0x164
__driver_attach+0x9c/0x1ac
bus_for_each_dev+0x74/0xd0
driver_attach+0x24/0x30
bus_add_driver+0xe4/0x208
driver_register+0x60/0x128
__platform_driver_register+0x24/0x30
g12a_clkc_driver_init+0x1c/0x28
do_one_initcall+0x64/0x308
kernel_init_freeable+0x27c/0x4f8
kernel_init+0x20/0x1d8
ret_from_fork+0x10/0x20
Code:
52800038 aa0003fc b9010018 52819801 (
f9400260)
---[ end trace
0000000000000000 ]---
Fix this by correcting the clock init data.
Fixes: 4c4e17f27013 ("clk: amlogic: naming consistency alignment")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on BananPi M2S
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
[CLKID_CPUB_CLK_DYN0_SEL] = &g12b_cpub_clk_dyn0_sel.hw,
[CLKID_CPUB_CLK_DYN0_DIV] = &g12b_cpub_clk_dyn0_div.hw,
[CLKID_CPUB_CLK_DYN0] = &g12b_cpub_clk_dyn0.hw,
- [CLKID_CPUB_CLK_DYN1_SEL] = &g12b_cpub_clk_dyn1.hw,
+ [CLKID_CPUB_CLK_DYN1_SEL] = &g12b_cpub_clk_dyn1_sel.hw,
[CLKID_CPUB_CLK_DYN1_DIV] = &g12b_cpub_clk_dyn1_div.hw,
[CLKID_CPUB_CLK_DYN1] = &g12b_cpub_clk_dyn1.hw,
[CLKID_CPUB_CLK_DYN] = &g12b_cpub_clk_dyn.hw,