]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm: mach-k3: am62p: fixup thermal cooling device by cpu number
authorJoão Paulo Gonçalves <joao.goncalves@toradex.com>
Mon, 23 Jun 2025 17:39:56 +0000 (14:39 -0300)
committerTom Rini <trini@konsulko.com>
Wed, 9 Jul 2025 14:40:03 +0000 (08:40 -0600)
TI AM62Px devices support CPU throttling based on thermal alerts.
However, the device tree assumes a 4-core configuration. Since the AM62P
also supports 2-core configurations, add a fixup to dynamically adjust
the cooling-device nodes within thermal zones based on the actual number
of CPU cores available.

Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
arch/arm/mach-k3/am62px/am62p5_fdt.c

index 4d8061354c84c0f429d2ad0447bcdc2aea4d1004..4a5ff594df66878368777cd7aa79b3adf0a094e1 100644 (file)
@@ -6,6 +6,7 @@
 #include <asm/arch/k3-common-fdt.h>
 #include <asm/hardware.h>
 #include <fdt_support.h>
+#include <fdtdec.h>
 
 static void fdt_fixup_cores_wdt_nodes_am62p(void *blob, int core_nr)
 {
@@ -49,12 +50,48 @@ static void fdt_fixup_cpu_freq_nodes_am62p(void *blob, int max_freq)
        }
 }
 
+static void fdt_fixup_thermal_cooling_device_cpus_am62p(void *blob, int core_nr)
+{
+       static const char * const thermal_path[] = {
+               "/thermal-zones/main0-thermal/cooling-maps/map0",
+               "/thermal-zones/main1-thermal/cooling-maps/map0",
+               "/thermal-zones/main2-thermal/cooling-maps/map0"
+       };
+
+       int node, cnt, i, ret;
+       u32 cooling_dev[12];
+
+       for (i = 0; i < ARRAY_SIZE(thermal_path); i++) {
+               int new_count = core_nr * 3;  /* Each CPU has 3 entries */
+               int j;
+
+               node = fdt_path_offset(blob, thermal_path[i]);
+               if (node < 0)
+                       continue;
+
+               cnt = fdtdec_get_int_array_count(blob, node, "cooling-device",
+                                                cooling_dev, ARRAY_SIZE(cooling_dev));
+               if (cnt < 0)
+                       continue;
+
+               for (j = 0; j < new_count; j++)
+                       cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]);
+
+               ret = fdt_setprop(blob, node, "cooling-device", cooling_dev,
+                                 new_count * sizeof(u32));
+               if (ret < 0)
+                       printf("Error %s, cooling-device setprop failed %d\n",
+                              thermal_path[i], ret);
+       }
+}
+
 int ft_system_setup(void *blob, struct bd_info *bd)
 {
        fdt_fixup_cores_wdt_nodes_am62p(blob, k3_get_core_nr());
        fdt_fixup_video_codec_nodes_am62p(blob, k3_has_video_codec());
        fdt_fixup_canfd_nodes_am62p(blob, k3_has_canfd());
        fdt_fixup_thermal_critical_trips_k3(blob, k3_get_max_temp());
+       fdt_fixup_thermal_cooling_device_cpus_am62p(blob, k3_get_core_nr());
        fdt_fixup_cpu_freq_nodes_am62p(blob, k3_get_a53_max_frequency());
        fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000);
        fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000);