3.4-stable patches

added patches:
	arm-orion-fix-virtual-physical-mixup-with-watchdog.patch
	arm-tegra-make-tegra_cpu_reset_handler_enable-__init.patch

diff --git a/queue-3.4/arm-orion-fix-virtual-physical-mixup-with-watchdog.patch b/queue-3.4/arm-orion-fix-virtual-physical-mixup-with-watchdog.patch
new file mode 100644 (file)
index 0000000..a979766
--- /dev/null
+++ b/queue-3.4/arm-orion-fix-virtual-physical-mixup-with-watchdog.patch
@@ -0,0 +1,81 @@
+From 0fa1f0609a0c1fe8b2be3c0089a2cb48f7fda521 Mon Sep 17 00:00:00 2001
+From: Andrew Lunn <andrew@lunn.ch>
+Date: Fri, 22 Jun 2012 08:54:02 +0200
+Subject: ARM: Orion: Fix Virtual/Physical mixup with watchdog
+
+From: Andrew Lunn <andrew@lunn.ch>
+
+commit 0fa1f0609a0c1fe8b2be3c0089a2cb48f7fda521 upstream.
+
+The orion watchdog is expecting to be passed the physcial address of
+the hardware, and will ioremap() it to give a virtual address it will
+use as the base address for the hardware. However, when creating the
+platform resource record, a virtual address was being used.
+
+Add the necassary #define's so we can pass the physical address as
+expected.
+
+Tested on Kirkwood and Orion5x.
+
+Signed-off-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Olof Johansson <olof@lixom.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-kirkwood/include/mach/bridge-regs.h |    1 +
+ arch/arm/mach-kirkwood/include/mach/kirkwood.h    |    1 +
+ arch/arm/mach-orion5x/include/mach/bridge-regs.h  |    2 +-
+ arch/arm/mach-orion5x/include/mach/orion5x.h      |    1 +
+ arch/arm/plat-orion/common.c                      |    2 +-
+ 5 files changed, 5 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
++++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+@@ -38,6 +38,7 @@
+ #define IRQ_MASK_HIGH_OFF     0x0014
+ 
+ #define TIMER_VIRT_BASE               (BRIDGE_VIRT_BASE | 0x0300)
++#define TIMER_PHYS_BASE               (BRIDGE_PHYS_BASE | 0x0300)
+ 
+ #define L2_CONFIG_REG         (BRIDGE_VIRT_BASE | 0x0128)
+ #define L2_WRITETHROUGH               0x00000010
+--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+@@ -80,6 +80,7 @@
+ #define  UART1_VIRT_BASE      (DEV_BUS_VIRT_BASE | 0x2100)
+ 
+ #define BRIDGE_VIRT_BASE      (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
++#define BRIDGE_PHYS_BASE      (KIRKWOOD_REGS_PHYS_BASE | 0x20000)
+ 
+ #define CRYPTO_PHYS_BASE      (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
+ 
+--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
++++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+@@ -35,5 +35,5 @@
+ #define MAIN_IRQ_MASK         (ORION5X_BRIDGE_VIRT_BASE | 0x204)
+ 
+ #define TIMER_VIRT_BASE               (ORION5X_BRIDGE_VIRT_BASE | 0x300)
+-
++#define TIMER_PHYS_BASE               (ORION5X_BRIDGE_PHYS_BASE | 0x300)
+ #endif
+--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
++++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
+@@ -82,6 +82,7 @@
+ #define  UART1_VIRT_BASE              (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
+ 
+ #define ORION5X_BRIDGE_VIRT_BASE      (ORION5X_REGS_VIRT_BASE | 0x20000)
++#define ORION5X_BRIDGE_PHYS_BASE      (ORION5X_REGS_PHYS_BASE | 0x20000)
+ 
+ #define ORION5X_PCI_VIRT_BASE         (ORION5X_REGS_VIRT_BASE | 0x30000)
+ 
+--- a/arch/arm/plat-orion/common.c
++++ b/arch/arm/plat-orion/common.c
+@@ -570,7 +570,7 @@ void __init orion_spi_1_init(unsigned lo
+ static struct orion_wdt_platform_data orion_wdt_data;
+ 
+ static struct resource orion_wdt_resource =
+-              DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28);
++              DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
+ 
+ static struct platform_device orion_wdt_device = {
+       .name           = "orion_wdt",

diff --git a/queue-3.4/arm-tegra-make-tegra_cpu_reset_handler_enable-__init.patch b/queue-3.4/arm-tegra-make-tegra_cpu_reset_handler_enable-__init.patch
new file mode 100644 (file)
index 0000000..b719b60
--- /dev/null
+++ b/queue-3.4/arm-tegra-make-tegra_cpu_reset_handler_enable-__init.patch
@@ -0,0 +1,33 @@
+From 6355f25ed965421725d92cf719fc63008690ca1c Mon Sep 17 00:00:00 2001
+From: Stephen Warren <swarren@nvidia.com>
+Date: Mon, 18 Jun 2012 15:01:50 -0600
+Subject: ARM: tegra: make tegra_cpu_reset_handler_enable() __init
+
+From: Stephen Warren <swarren@nvidia.com>
+
+commit 6355f25ed965421725d92cf719fc63008690ca1c upstream.
+
+This solves a section mismatch warning. I hadn't noticed this before,
+because my compiler was inlining tegra_cpu_reset_handler_enable() inside
+tegra_cpu_reset_handler_init(), which is already __init, but I switched
+compilers and it stopped doing that.
+
+Signed-off-by: Stephen Warren <swarren@nvidia.com>
+Signed-off-by: Olof Johansson <olof@lixom.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-tegra/reset.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/mach-tegra/reset.c
++++ b/arch/arm/mach-tegra/reset.c
+@@ -33,7 +33,7 @@
+ 
+ static bool is_enabled;
+ 
+-static void tegra_cpu_reset_handler_enable(void)
++static void __init tegra_cpu_reset_handler_enable(void)
+ {
+       void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
+       void __iomem *evp_cpu_reset =

diff --git a/queue-3.4/series b/queue-3.4/series
index f922113850aee5bf10aab330c38615554be2febe..82ee75a2d2127b97631cf9161e0b91868ab91cb9 100644 (file)
--- a/queue-3.4/series
+++ b/queue-3.4/series
@@ -1 +1,3 @@
 tools-hv-verify-origin-of-netlink-connector-message.patch
+arm-orion-fix-virtual-physical-mixup-with-watchdog.patch
+arm-tegra-make-tegra_cpu_reset_handler_enable-__init.patch