arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform

Add llcc support for the SA8775p platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240529101534.3166507-4-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index b760f625ff093c1bdfbf733913dfeb3cb0e066a2..eae0de9720b521117ac5c751f57e9285cfd0372d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2885,6 +2885,25 @@
                        status = "disabled";
                };
 
+               llcc: system-cache-controller@9200000 {
+                       compatible = "qcom,sa8775p-llcc";
+                       reg = <0x0 0x09200000 0x0 0x80000>,
+                             <0x0 0x09300000 0x0 0x80000>,
+                             <0x0 0x09400000 0x0 0x80000>,
+                             <0x0 0x09500000 0x0 0x80000>,
+                             <0x0 0x09600000 0x0 0x80000>,
+                             <0x0 0x09700000 0x0 0x80000>,
+                             <0x0 0x09a00000 0x0 0x80000>;
+                       reg-names = "llcc0_base",
+                                   "llcc1_base",
+                                   "llcc2_base",
+                                   "llcc3_base",
+                                   "llcc4_base",
+                                   "llcc5_base",
+                                   "llcc_broadcast_base";
+                       interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                pdc: interrupt-controller@b220000 {
                        compatible = "qcom,sa8775p-pdc", "qcom,pdc";
                        reg = <0x0 0x0b220000 0x0 0x30000>,