arm64: dts: qcom: x1e80100: Add Broadcast_AND region in LLCC block

Add missing Broadcast_AND region to the LLCC block for x1e80100,
as the LLCC version on this platform is 4.1 and it provides the region.

This also fixes the following error caused by the missing region:

[    3.797768] qcom-llcc 25000000.system-cache-controller: error -EINVAL: invalid resource (null)

This error started showing up only after the new regmap region called
Broadcast_AND that has been added to the llcc-qcom driver.

Cc: stable@vger.kernel.org # 6.11: 055afc34fd21: soc: qcom: llcc: Add regmap for Broadcast_AND region
Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241014-x1e80100-dts-llcc-add-broadcastand_region-v2-1-5ee6ac128627@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 88a2e2f92599ab470599a65207e916fbef0828fa..27796ba1216f066d7dc976e6e0cc538f928334c1 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -6090,7 +6090,8 @@
                              <0 0x25a00000 0 0x200000>,
                              <0 0x25c00000 0 0x200000>,
                              <0 0x25e00000 0 0x200000>,
-                             <0 0x26000000 0 0x200000>;
+                             <0 0x26000000 0 0x200000>,
+                             <0 0x26200000 0 0x200000>;
                        reg-names = "llcc0_base",
                                    "llcc1_base",
                                    "llcc2_base",
@@ -6099,7 +6100,8 @@
                                    "llcc5_base",
                                    "llcc6_base",
                                    "llcc7_base",
-                                   "llcc_broadcast_base";
+                                   "llcc_broadcast_base",
+                                   "llcc_broadcast_and_base";
                        interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
                };