{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_1000BASEKX) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I225_IT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I225_V) },
{}
};
case PCI_DEVICE_ID_INTEL_I210_1000BASEKX:
case PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED:
case PCI_DEVICE_ID_INTEL_I225_IT:
+ case PCI_DEVICE_ID_INTEL_I225_V:
hw->mac_type = e1000_igb;
break;
default:
hw->phy_type = e1000_phy_igb;
break;
case I225_I_PHY_ID:
+ case I225_V_PHY_ID:
case I226_LM_PHY_ID:
case I226_I_PHY_ID:
hw->phy_type = e1000_phy_igc;
match = true;
if (hw->phy_id == I225_I_PHY_ID)
match = true;
+ if (hw->phy_id == I225_V_PHY_ID)
+ match = true;
if (hw->phy_id == I226_LM_PHY_ID)
match = true;
if (hw->phy_id == I226_I_PHY_ID)
#define I226_LM_PHY_ID 0x67C9DC10
#define I225_I_PHY_ID 0x67C9DCC0
#define I226_I_PHY_ID 0x67C9DCD0
+#define I225_V_PHY_ID 0x67C9DC00
/* Miscellaneous PHY bit definitions. */
#define PHY_PREAMBLE 0xFFFFFFFF
#define PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS 0x157c
#define PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED 0x15fd
#define PCI_DEVICE_ID_INTEL_I225_IT 0x0d9f
+#define PCI_DEVICE_ID_INTEL_I225_V 0x15f3
#define PCI_DEVICE_ID_INTEL_80960_RP 0x1960
#define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21
#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30