drm/amdkfd: Fix reg offset for setting CWSR grace period

This patch fixes the case where the code currently passes
absolute register address and not the reg offset, which HWS
expects, when sending the PM4 packet to set/update CWSR grace
period. Additionally, cleanup the signature of
build_grace_period_packet_info function as it no longer needs
the inst parameter.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
index f1f2c24de081eb1f300b2664a53f221591f50e06..69810b3f1c63613f6686f181cdeccf5d9513c2d9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
@@ -980,8 +980,7 @@ void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev,
                                                uint32_t wait_times,
                                                uint32_t grace_period,
                                                uint32_t *reg_offset,
-                                               uint32_t *reg_data,
-                                               uint32_t inst)
+                                               uint32_t *reg_data)
 {
        *reg_data = wait_times;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
index ecaead24e8c96bbe288fffcac96b067f33fb1589..67bcaa3d4226410279a6bce1b62b7e0cd206259f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
@@ -55,5 +55,4 @@ void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev,
                                               uint32_t wait_times,
                                               uint32_t grace_period,
                                               uint32_t *reg_offset,
-                                              uint32_t *reg_data,
-                                              uint32_t inst);
+                                              uint32_t *reg_data);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index fa5ee96f884545c6fe6aec9573441399fbb3ef9a..3c45a188b701ab0c406481146ff1942576acc413 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -1103,8 +1103,7 @@ void kgd_gfx_v9_build_grace_period_packet_info(struct amdgpu_device *adev,
                uint32_t wait_times,
                uint32_t grace_period,
                uint32_t *reg_offset,
-               uint32_t *reg_data,
-               uint32_t inst)
+               uint32_t *reg_data)
 {
        *reg_data = wait_times;
 
@@ -1120,8 +1119,7 @@ void kgd_gfx_v9_build_grace_period_packet_info(struct amdgpu_device *adev,
                        SCH_WAVE,
                        grace_period);
 
-       *reg_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, inst),
-                       mmCP_IQ_WAIT_TIME2);
+       *reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2);
 }
 
 void kgd_gfx_v9_program_trap_handler_settings(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h
index 936e501908cef3760865ed6d888127a59bbffcbc..ce424615f59b5bc753c54b8dc83bf1161fca407e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h
@@ -100,5 +100,4 @@ void kgd_gfx_v9_build_grace_period_packet_info(struct amdgpu_device *adev,
                                               uint32_t wait_times,
                                               uint32_t grace_period,
                                               uint32_t *reg_offset,
-                                              uint32_t *reg_data,
-                                              uint32_t inst);
+                                              uint32_t *reg_data);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index b166f30f083e0aad6498bd96f603dcfad3977296..8a6cb41444a4767a1f5270d49af93ec8722269b6 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -1677,8 +1677,7 @@ static int start_cpsch(struct device_queue_manager *dqm)
                        dqm->dev->kfd2kgd->build_grace_period_packet_info(
                                        dqm->dev->adev, dqm->wait_times,
                                        grace_period, &reg_offset,
-                                       &dqm->wait_times,
-                                       ffs(dqm->dev->xcc_mask) - 1);
+                                       &dqm->wait_times);
        }
 
        dqm_unlock(dqm);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
index 8ce6f5200905164a433e04c290c7f63f6ca05f5a..1a03173e23133799d1d6be4a064a7fde0bb25923 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
@@ -299,8 +299,7 @@ static int pm_set_grace_period_v9(struct packet_manager *pm,
                        pm->dqm->wait_times,
                        grace_period,
                        &reg_offset,
-                       &reg_data,
-                       0);
+                       &reg_data);
 
        if (grace_period == USE_DEFAULT_GRACE_PERIOD)
                reg_data = pm->dqm->wait_times;

diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
index 8433f99f66679dbcee25bb7567d993fcb8673294..f3f40dbb8ff71b86f9ab094413932d3cd1ff7daa 100644 (file)
--- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
@@ -326,8 +326,7 @@ struct kfd2kgd_calls {
                        uint32_t wait_times,
                        uint32_t grace_period,
                        uint32_t *reg_offset,
-                       uint32_t *reg_data,
-                       uint32_t inst);
+                       uint32_t *reg_data);
        void (*get_cu_occupancy)(struct amdgpu_device *adev, int pasid,
                        int *wave_cnt, int *max_waves_per_cu, uint32_t inst);
        void (*program_trap_handler_settings)(struct amdgpu_device *adev,