to the ABI we have selected, perhaps via a `set mips abi ...'
override, rather than ones inferred from the ABI set in the ELF
headers of the binary file selected for debugging. */
+
static const char mips_disassembler_options_o32[] = "gpr-names=32";
static const char mips_disassembler_options_n32[] = "gpr-names=n32";
static const char mips_disassembler_options_n64[] = "gpr-names=64";
"fsr", "fir"
};
-
/* Return the name of the register corresponding to REGNO. */
static const char *
mips_register_name (struct gdbarch *gdbarch, int regno)
configured to be 32-bits wide. The registers that the user
sees - the pseudo registers - match the users expectations
given the programming model being used. */
+
int rawnum = regno % gdbarch_num_regs (gdbarch);
if (regno < gdbarch_num_regs (gdbarch))
return "";
elfread.c in the high bit of the info field. Use this to decide
if the function is MIPS16. Otherwise if bit 0 of the address is
set, then ELF file flags will tell if this is a MIPS16 function. */
+
bound_minimal_symbol sym
= lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
if (sym.minsym)
if the function is microMIPS. Otherwise if bit 0 of the address
is set, then ELF file flags will tell if this is a microMIPS
function. */
+
bound_minimal_symbol sym
= lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
if (sym.minsym)
this to decide if the function is MIPS16 or microMIPS or normal
MIPS. Otherwise if bit 0 of the address is set, then ELF file
flags will tell if this is a MIPS16 or a microMIPS function. */
+
bound_minimal_symbol sym
= lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
if (sym.minsym)
else
pc += 8; /* After the delay slot. */
}
-
else
pc += 4; /* Not a branch, next instruction is easy. */
}
extRi64type, /* 20 5,6,5,5,3,3,5 */
extshift64type /* 21 5,5,1,1,1,1,1,1,5,1,1,1,3,5 */
};
+
/* I am heaping all the fields of the formats into one structure and
then, only the fields which are involved in instruction extension. */
struct upk_mips16
unsigned int regy;
};
-
/* The EXT-I, EXT-ri nad EXT-I8 instructions all have the same format
for the bits which make up the immediate extension. */
upk->regy = regy;
}
-
/* Calculate the destination of a branch whose 16-bit opcode word is at PC,
and having a signed 16-bit OFFSET. */
It works by decoding the current instruction and predicting where a
branch will go. This isn't hard because all the data is available.
The MIPS32, MIPS16 and microMIPS variants are quite different. */
+
static CORE_ADDR
mips_next_pc (struct regcache *regcache, CORE_ADDR pc)
{
}
}
-
/* Fetch the immediate value from a MIPS16 instruction.
If the previous instruction was an EXTEND, use it to extend
the upper bits of the immediate value. This is a helper function
}
}
-
/* Analyze the function prologue from START_PC to LIMIT_PC. Builds
the associated FRAME_CACHE if not null.
Return the address of the first instruction past the prologue. */
return addr;
}
-
/* Checks for an atomic sequence of instructions beginning with a LL/LLD
instruction and ending with a SC/SCD instruction. If such a sequence
is found, attempt to step through it. A breakpoint is placed at the end of
return (insn & ~hint) == 0x3e00008; /* jr(.hb) $ra */
}
-
/* This fencepost looks highly suspicious to me. Removing it also
seems suspicious as it could affect remote debugging across serial
lines. */
/* Adjust the address downward (direction of stack growth) so that it
is correctly aligned for a new stack frame. */
+
static CORE_ADDR
mips_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
{
return RETURN_VALUE_REGISTER_CONVENTION;
}
-
/* N32/N64 ABI stuff. */
/* Search for a naturally aligned double at OFFSET inside a struct
return regnum + 1;
}
-
/* Print a row's worth of GP (int) registers, with name labels above. */
static int
("The MIPS floating-point coprocessor is assumed to be %s\n", fpu);
}
-
static void
set_mipsfpu_single_command (const char *args, int from_tty)
{
return gdbarch_num_regs (gdbarch) + regnum;
}
-
/* Convert a dwarf, dwarf2, or ecoff register number to a GDB [1 *
gdbarch_num_regs .. 2 * gdbarch_num_regs) REGNUM. */
return LEGACY_SIM_REGNO_IGNORE;
}
-
/* Convert an integer into an address. Extracting the value signed
guarantees a correctly sign extended address. */
valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
mips_gprs[i]);
-
valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
mips_regnum.lo, "lo");
valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
projects / thirdparty / binutils-gdb.git / commitdiff
