]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
soundwire: amd: set device power state during suspend/resume sequence
authorVijendar Mukunda <Vijendar.Mukunda@amd.com>
Fri, 7 Feb 2025 06:58:39 +0000 (12:28 +0530)
committerVinod Koul <vkoul@kernel.org>
Thu, 13 Feb 2025 16:21:07 +0000 (21:51 +0530)
Set SoundWire manager device power state during suspend and resume
sequence for ACP7.0 & ACP7.1 platforms.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20250207065841.4718-5-Vijendar.Mukunda@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/soundwire/amd_manager.c
drivers/soundwire/amd_manager.h

index 97164d6edbe0b3187367f680f558d6c8310acf08..50d7b10b0581583662d57a2cc0542549efc13571 100644 (file)
@@ -143,6 +143,29 @@ static void amd_sdw_wake_enable(struct amd_sdw_manager *amd_manager, bool enable
        writel(wake_ctrl, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11);
 }
 
+static int amd_sdw_set_device_state(struct amd_sdw_manager *amd_manager, u32 target_device_state)
+{
+       u32 sdw_dev_state;
+
+       sdw_dev_state = readl(amd_manager->acp_mmio + AMD_SDW_DEVICE_STATE);
+       switch (amd_manager->instance) {
+       case ACP_SDW0:
+               u32p_replace_bits(&sdw_dev_state, target_device_state,
+                                 AMD_SDW0_DEVICE_STATE_MASK);
+               break;
+       case ACP_SDW1:
+               u32p_replace_bits(&sdw_dev_state, target_device_state,
+                                 AMD_SDW1_DEVICE_STATE_MASK);
+               break;
+       default:
+               return -EINVAL;
+       }
+       writel(sdw_dev_state, amd_manager->acp_mmio + AMD_SDW_DEVICE_STATE);
+       sdw_dev_state = readl(amd_manager->acp_mmio + AMD_SDW_DEVICE_STATE);
+       dev_dbg(amd_manager->dev, "AMD_SDW_DEVICE_STATE:0x%x\n", sdw_dev_state);
+       return 0;
+}
+
 static void amd_sdw_ctl_word_prep(u32 *lower_word, u32 *upper_word, struct sdw_msg *msg,
                                  int cmd_offset)
 {
@@ -1159,7 +1182,9 @@ static int __maybe_unused amd_suspend(struct device *dev)
 
        if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
                amd_sdw_wake_enable(amd_manager, false);
-               return amd_sdw_clock_stop(amd_manager);
+               ret = amd_sdw_clock_stop(amd_manager);
+               if (ret)
+                       return ret;
        } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
                amd_sdw_wake_enable(amd_manager, false);
                /*
@@ -1169,7 +1194,14 @@ static int __maybe_unused amd_suspend(struct device *dev)
                ret = amd_sdw_clock_stop(amd_manager);
                if (ret)
                        return ret;
-               return amd_deinit_sdw_manager(amd_manager);
+               ret = amd_deinit_sdw_manager(amd_manager);
+               if (ret)
+                       return ret;
+       }
+       if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+               ret = amd_sdw_set_device_state(amd_manager, AMD_SDW_DEVICE_STATE_D3);
+               if (ret)
+                       return ret;
        }
        return 0;
 }
@@ -1187,13 +1219,22 @@ static int __maybe_unused amd_suspend_runtime(struct device *dev)
        }
        if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
                amd_sdw_wake_enable(amd_manager, true);
-               return amd_sdw_clock_stop(amd_manager);
+               ret = amd_sdw_clock_stop(amd_manager);
+               if (ret)
+                       return ret;
        } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
                amd_sdw_wake_enable(amd_manager, true);
                ret = amd_sdw_clock_stop(amd_manager);
                if (ret)
                        return ret;
-               return amd_deinit_sdw_manager(amd_manager);
+               ret = amd_deinit_sdw_manager(amd_manager);
+               if (ret)
+                       return ret;
+       }
+       if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+               ret = amd_sdw_set_device_state(amd_manager, AMD_SDW_DEVICE_STATE_D3);
+               if (ret)
+                       return ret;
        }
        return 0;
 }
@@ -1212,7 +1253,9 @@ static int __maybe_unused amd_resume_runtime(struct device *dev)
        }
 
        if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
-               return amd_sdw_clock_stop_exit(amd_manager);
+               ret = amd_sdw_clock_stop_exit(amd_manager);
+               if (ret)
+                       return ret;
        } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
                writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance));
                val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
@@ -1235,6 +1278,11 @@ static int __maybe_unused amd_resume_runtime(struct device *dev)
                        return ret;
                amd_sdw_set_frameshape(amd_manager);
        }
+       if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+               ret = amd_sdw_set_device_state(amd_manager, AMD_SDW_DEVICE_STATE_D0);
+               if (ret)
+                       return ret;
+       }
        return 0;
 }
 
index 30244a31c21c7be7ad4bd0b98d6db4f430f60b80..8430f279d88e9003de79708bbdd2ba7431a8c76a 100644 (file)
 #define AMD_SDW_CLK_RESUME_DONE                                3
 #define AMD_SDW_WAKE_STAT_MASK                         BIT(16)
 #define AMD_SDW_WAKE_INTR_MASK                         BIT(16)
+#define AMD_SDW_DEVICE_STATE                           0x1430
+#define AMD_SDW0_DEVICE_STATE_MASK                     GENMASK(1, 0)
+#define AMD_SDW1_DEVICE_STATE_MASK                     GENMASK(3, 2)
+#define AMD_SDW_DEVICE_STATE_D0                                0
+#define AMD_SDW_DEVICE_STATE_D3                                3
 
 static u32 amd_sdw_freq_tbl[AMD_SDW_MAX_FREQ_NUM] = {
        AMD_SDW_DEFAULT_CLK_FREQ,