RISC-V: Suppress warning for signed and unsigned integer comparison.

gcc/ChangeLog:

	* config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
	unsigned for i.
	(riscv_gpr_save_operation_p): Change type to unsigned for i and
	len.

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 02ebf1945eac06eafd22fe9867a9448792a6bde4..328c0c823a39ae918ac7137c38f9aaab3d9981f3 100644 (file)
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -5187,7 +5187,7 @@ riscv_gen_gpr_save_insn (struct riscv_frame_info *frame)
     gen_rtx_UNSPEC_VOLATILE (VOIDmode,
       gen_rtvec (1, GEN_INT (count)), UNSPECV_GPR_SAVE);
 
-  for (int i = 1; i < veclen; ++i)
+  for (unsigned i = 1; i < veclen; ++i)
     {
       unsigned regno = gpr_save_reg_order[i];
       rtx reg = gen_rtx_REG (Pmode, regno);
@@ -5215,9 +5215,9 @@ riscv_gen_gpr_save_insn (struct riscv_frame_info *frame)
 bool
 riscv_gpr_save_operation_p (rtx op)
 {
-  HOST_WIDE_INT len = XVECLEN (op, 0);
+  unsigned len = XVECLEN (op, 0);
   gcc_assert (len <= ARRAY_SIZE (gpr_save_reg_order));
-  for (int i = 0; i < len; i++)
+  for (unsigned i = 0; i < len; i++)
     {
       rtx elt = XVECEXP (op, 0, i);
       if (i == 0)