]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu/jpeg: clean up reset type handling
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Jul 2025 15:37:56 +0000 (11:37 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 16 Jul 2025 20:17:16 +0000 (16:17 -0400)
Make the handling consistent with other IPs and across
JPEG versions.

Reviewed-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

index 554af4b9930e309ebd37a801e83609fd371e6aad..b93d6af8f6e545d99415bbdae792a9790084a3ed 100644 (file)
@@ -118,8 +118,10 @@ static int jpeg_v2_0_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
+       adev->jpeg.supported_reset =
+               amdgpu_get_soft_full_reset_mask(adev->jpeg.inst[0].ring_dec);
        if (!amdgpu_sriov_vf(adev))
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
 
        return r;
index 4e489a7e211576ff0e7be343103d0203c49169ba..b6d5ba0bdc143a01d2e3a908319914373936b9a1 100644 (file)
@@ -167,8 +167,10 @@ static int jpeg_v2_5_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
+       adev->jpeg.supported_reset =
+               amdgpu_get_soft_full_reset_mask(adev->jpeg.inst[0].ring_dec);
        if (!amdgpu_sriov_vf(adev))
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
 
        return r;
index d4bc4fca460c8d284c61361844d4c8fdd769e9a3..a229d7eb900c901eccb06f391395284c6ed0462f 100644 (file)
@@ -132,8 +132,10 @@ static int jpeg_v3_0_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
+       adev->jpeg.supported_reset =
+               amdgpu_get_soft_full_reset_mask(adev->jpeg.inst[0].ring_dec);
        if (!amdgpu_sriov_vf(adev))
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
 
        return r;
index ca3debe371c5a8b83c6153322205ab726e057446..f3a9073b8b24315155c0d3a18583d90aacfbf3e3 100644 (file)
@@ -143,8 +143,10 @@ static int jpeg_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
+       adev->jpeg.supported_reset =
+               amdgpu_get_soft_full_reset_mask(adev->jpeg.inst[0].ring_dec);
        if (!amdgpu_sriov_vf(adev))
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
 
        return r;
index c3f73a2a911b45447f509107087a72bb95bc2250..b86288a69e7b7bd6e82d98da7595f5427902d4fd 100644 (file)
@@ -216,12 +216,11 @@ static int jpeg_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
-       if (!amdgpu_sriov_vf(adev)) {
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
-               r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
-               if (r)
-                       return r;
-       }
+       adev->jpeg.supported_reset =
+               amdgpu_get_soft_full_reset_mask(adev->jpeg.inst[0].ring_dec);
+       if (!amdgpu_sriov_vf(adev))
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+       r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
 
        return 0;
 }
@@ -242,8 +241,7 @@ static int jpeg_v4_0_3_sw_fini(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
-       if (!amdgpu_sriov_vf(adev))
-               amdgpu_jpeg_sysfs_reset_mask_fini(adev);
+       amdgpu_jpeg_sysfs_reset_mask_fini(adev);
 
        r = amdgpu_jpeg_sw_fini(adev);
 
index 5a69a44e0f85527a51ec72918ff691cbc667cdae..1892c278ea3c4c1809078fe40dbe275869e844a7 100644 (file)
@@ -177,7 +177,7 @@ static int jpeg_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block)
        adev->jpeg.supported_reset =
                amdgpu_get_soft_full_reset_mask(&adev->jpeg.inst[0].ring_dec[0]);
        if (!amdgpu_sriov_vf(adev))
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
        if (r)
                return r;
index d6b565c29b4b24c7c2be68acbfea7cfba3d746b5..0b4de0c6476ae844de8677f582b4060bc3f2523d 100644 (file)
@@ -123,11 +123,10 @@ static int jpeg_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block)
        adev->jpeg.supported_reset =
                amdgpu_get_soft_full_reset_mask(&adev->jpeg.inst[0].ring_dec[0]);
        if (!amdgpu_sriov_vf(adev))
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
-       if (r)
-               return r;
-       return 0;
+
+       return r;
 }
 
 /**
index 5473cbaa5c0e87c3cc8921cabcc21f39758dc3dc..e622db1f818bf4876cf7e537384a84c2c13049b8 100644 (file)
@@ -200,14 +200,13 @@ static int jpeg_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
-       if (!amdgpu_sriov_vf(adev)) {
-               adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
-               r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
-               if (r)
-                       return r;
-       }
+       adev->jpeg.supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->jpeg.inst[0].ring_dec[0]);
+       if (!amdgpu_sriov_vf(adev))
+               adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+       r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
 
-       return 0;
+       return r;
 }
 
 /**
@@ -226,8 +225,7 @@ static int jpeg_v5_0_1_sw_fini(struct amdgpu_ip_block *ip_block)
        if (r)
                return r;
 
-       if (!amdgpu_sriov_vf(adev))
-               amdgpu_jpeg_sysfs_reset_mask_fini(adev);
+       amdgpu_jpeg_sysfs_reset_mask_fini(adev);
 
        r = amdgpu_jpeg_sw_fini(adev);