arm64: dts: rockchip: Add sdmmc_ext for RK3328

RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some
boards have sdio wifi connected to it. In order to use it
one would have to add the pinctrls from sdmmc0ext group which
is done on board level.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240710132830.14710-3-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index b01efd6d042c8e2e0790db1872b432b5c6cb34eb..95c3f1303544f001517b649d1a443e8e08e23912 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1036,6 +1036,20 @@
                status = "disabled";
        };
 
+       sdmmc_ext: mmc@ff5f0000 {
+               compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
+               reg = <0x0 0xff5f0000 0x0 0x4000>;
+               interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
+                        <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+               fifo-depth = <0x100>;
+               max-frequency = <150000000>;
+               resets = <&cru SRST_SDMMCEXT>;
+               reset-names = "reset";
+               status = "disabled";
+       };
+
        usbdrd3: usb@ff600000 {
                compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
                reg = <0x0 0xff600000 0x0 0x100000>;