net: stmmac: dwmac-rk: Add initial support for RK3528 integrated PHY

Rockchip RK3528 (and RV1106) has a different integrated PHY compared to
the integrated PHY on RK3228/RK3328. Current powerup/down operation is
not compatible with the integrated PHY found in these newer SoCs.

Add operations to powerup/down the integrated PHY found in RK3528.
Use helpers that can be used by other GMAC variants in the future.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250319214415.3086027-6-jonas@kwiboo.se
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 3673abd653020da9f5a5727c29e6e1f0383843e9..700858ff6f7c33fdca08100dd7406aedeff0fc41 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -134,6 +134,35 @@ static void rk_gmac_integrated_ephy_powerdown(struct rk_priv_data *priv)
                reset_control_assert(priv->phy_reset);
 }
 
+#define RK_FEPHY_SHUTDOWN              GRF_BIT(1)
+#define RK_FEPHY_POWERUP               GRF_CLR_BIT(1)
+#define RK_FEPHY_INTERNAL_RMII_SEL     GRF_BIT(6)
+#define RK_FEPHY_24M_CLK_SEL           (GRF_BIT(8) | GRF_BIT(9))
+#define RK_FEPHY_PHY_ID                        GRF_BIT(11)
+
+static void rk_gmac_integrated_fephy_powerup(struct rk_priv_data *priv,
+                                            unsigned int reg)
+{
+       reset_control_assert(priv->phy_reset);
+       usleep_range(20, 30);
+
+       regmap_write(priv->grf, reg,
+                    RK_FEPHY_POWERUP |
+                    RK_FEPHY_INTERNAL_RMII_SEL |
+                    RK_FEPHY_24M_CLK_SEL |
+                    RK_FEPHY_PHY_ID);
+       usleep_range(10000, 12000);
+
+       reset_control_deassert(priv->phy_reset);
+       usleep_range(50000, 60000);
+}
+
+static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv,
+                                              unsigned int reg)
+{
+       regmap_write(priv->grf, reg, RK_FEPHY_SHUTDOWN);
+}
+
 #define PX30_GRF_GMAC_CON1             0x0904
 
 /* PX30_GRF_GMAC_CON1 */
@@ -993,12 +1022,24 @@ static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,
        }
 }
 
+static void rk3528_integrated_phy_powerup(struct rk_priv_data *bsp_priv)
+{
+       rk_gmac_integrated_fephy_powerup(bsp_priv, RK3528_VO_GRF_MACPHY_CON0);
+}
+
+static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv)
+{
+       rk_gmac_integrated_fephy_powerdown(bsp_priv, RK3528_VO_GRF_MACPHY_CON0);
+}
+
 static const struct rk_gmac_ops rk3528_ops = {
        .set_to_rgmii = rk3528_set_to_rgmii,
        .set_to_rmii = rk3528_set_to_rmii,
        .set_rgmii_speed = rk3528_set_rgmii_speed,
        .set_rmii_speed = rk3528_set_rmii_speed,
        .set_clock_selection = rk3528_set_clock_selection,
+       .integrated_phy_powerup = rk3528_integrated_phy_powerup,
+       .integrated_phy_powerdown = rk3528_integrated_phy_powerdown,
        .regs_valid = true,
        .regs = {
                0xffbd0000, /* gmac0 */