]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
soc/tegra: fuse: Add support for Tegra241
authorKartik <kkartik@nvidia.com>
Tue, 17 Oct 2023 05:23:22 +0000 (10:53 +0530)
committerThierry Reding <treding@nvidia.com>
Thu, 1 Feb 2024 14:58:05 +0000 (15:58 +0100)
Add support for Tegra241 which use ACPI boot.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/Kconfig
drivers/soc/tegra/fuse/fuse-tegra.c
drivers/soc/tegra/fuse/fuse-tegra30.c
drivers/soc/tegra/fuse/fuse.h
drivers/soc/tegra/fuse/tegra-apbmisc.c
include/soc/tegra/fuse.h

index f16beeabaa92bb890a3174227364bb84d2885b15..33512558af9f7f017a2aa286a3eacb142472f7e5 100644 (file)
@@ -133,6 +133,11 @@ config ARCH_TEGRA_234_SOC
        help
          Enable support for the NVIDIA Tegra234 SoC.
 
+config ARCH_TEGRA_241_SOC
+       bool "NVIDIA Tegra241 SoC"
+       help
+         Enable support for the NVIDIA Tegra241 SoC.
+
 endif
 endif
 
index 1c758f121f916cc9c756f973e073bee815518c60..233b8e7bb41bf9770d3c2180d71baf702ae0d6d0 100644 (file)
@@ -171,6 +171,11 @@ static int tegra_fuse_probe(struct platform_device *pdev)
                case TEGRA234:
                        fuse->soc = &tegra234_fuse_soc;
                        break;
+#endif
+#if defined(CONFIG_ARCH_TEGRA_241_SOC)
+               case TEGRA241:
+                       fuse->soc = &tegra241_fuse_soc;
+                       break;
 #endif
                default:
                        return dev_err_probe(&pdev->dev, -EINVAL, "Unsupported SoC: %02x\n", chip);
index e94d46372a6396d14ee5dab31f0aa378a18bc9e1..2070d36c510dcb73dcd49df92eec6e3fe8c85506 100644 (file)
@@ -678,3 +678,23 @@ const struct tegra_fuse_soc tegra234_fuse_soc = {
        .clk_suspend_on = false,
 };
 #endif
+
+#if defined(CONFIG_ARCH_TEGRA_241_SOC)
+static const struct tegra_fuse_info tegra241_fuse_info = {
+       .read = tegra30_fuse_read,
+       .size = 0x16008,
+       .spare = 0xcf0,
+};
+
+static const struct nvmem_keepout tegra241_fuse_keepouts[] = {
+       { .start = 0xc, .end = 0x1600c }
+};
+
+const struct tegra_fuse_soc tegra241_fuse_soc = {
+       .init = tegra30_fuse_init,
+       .info = &tegra241_fuse_info,
+       .keepouts = tegra241_fuse_keepouts,
+       .num_keepouts = ARRAY_SIZE(tegra241_fuse_keepouts),
+       .soc_attr_group = &tegra194_soc_attr_group,
+};
+#endif
index a41e9f85281aa87843f75ba63d54c97fc4d958db..f3b705327c20f898f1c308e020b1b2b2c97b7e16 100644 (file)
@@ -136,4 +136,8 @@ extern const struct tegra_fuse_soc tegra194_fuse_soc;
 extern const struct tegra_fuse_soc tegra234_fuse_soc;
 #endif
 
+#ifdef CONFIG_ARCH_TEGRA_241_SOC
+extern const struct tegra_fuse_soc tegra241_fuse_soc;
+#endif
+
 #endif
index 6457f80821bb9582c9b8b6a75add2aede4e16254..e2ca5d55fd31259452f444e7d846d9cc145f5e8c 100644 (file)
@@ -64,6 +64,7 @@ bool tegra_is_silicon(void)
        switch (tegra_get_chip_id()) {
        case TEGRA194:
        case TEGRA234:
+       case TEGRA241:
        case TEGRA264:
                if (tegra_get_platform() == 0)
                        return true;
index 3a513be502437f991cdb29518a83146e72f48a87..8f421b9f7585ca1714197c8c102d7a19e622d1a2 100644 (file)
@@ -17,6 +17,7 @@
 #define TEGRA186       0x18
 #define TEGRA194       0x19
 #define TEGRA234       0x23
+#define TEGRA241       0x24
 #define TEGRA264       0x26
 
 #define TEGRA_FUSE_SKU_CALIB_0 0xf0