gcc/ChangeLog:
* target.def: in0 and in1 do not need to be registers.
* doc/tm.texi: Regenerate.
also to emit such a permutation. In the former case @var{in0}, @var{in1}
and @var{out} are all null. In the latter case @var{in0} and @var{in1} are
the source vectors and @var{out} is the destination vector; all three are
-registers of mode @var{mode}. @var{in1} is the same as @var{in0} if
+operands of mode @var{mode}. @var{in1} is the same as @var{in0} if
@var{sel} describes a permutation on one vector instead of two.
Return true if the operation is possible, emitting instructions for it
also to emit such a permutation. In the former case @var{in0}, @var{in1}\n\
and @var{out} are all null. In the latter case @var{in0} and @var{in1} are\n\
the source vectors and @var{out} is the destination vector; all three are\n\
-registers of mode @var{mode}. @var{in1} is the same as @var{in0} if\n\
+operands of mode @var{mode}. @var{in1} is the same as @var{in0} if\n\
@var{sel} describes a permutation on one vector instead of two.\n\
\n\
Return true if the operation is possible, emitting instructions for it\n\