drm/xe: Replace RING_START_UDW by u64 RING_START

Other u64 registers are printed in a single line so RING_START
needs to follow that too.
As there is no upstream decoder tool parsing RING_START this will
not break any decoder application.

Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510150108.80679-1-jose.souza@intel.com

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 45f582a7caaa585dc3c8d1e788eb85ab1ef98d63..e19af179af3386f72904d07145e998bc550df768 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -908,11 +908,13 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
        snapshot->reg.ring_hwstam = hw_engine_mmio_read32(hwe, RING_HWSTAM(0));
        snapshot->reg.ring_hws_pga = hw_engine_mmio_read32(hwe, RING_HWS_PGA(0));
        snapshot->reg.ring_start = hw_engine_mmio_read32(hwe, RING_START(0));
+       if (GRAPHICS_VERx100(hwe->gt->tile->xe) >= 2000) {
+               val = hw_engine_mmio_read32(hwe, RING_START_UDW(0));
+               snapshot->reg.ring_start |= val << 32;
+       }
        if (xe_gt_has_indirect_ring_state(hwe->gt)) {
                snapshot->reg.indirect_ring_state =
                        hw_engine_mmio_read32(hwe, INDIRECT_RING_STATE(0));
-               snapshot->reg.ring_start_udw =
-                       hw_engine_mmio_read32(hwe, RING_START_UDW(0));
        }
 
        snapshot->reg.ring_head =
@@ -1003,9 +1005,7 @@ void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
                   snapshot->reg.ring_execlist_status);
        drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS: 0x%016llx\n",
                   snapshot->reg.ring_execlist_sq_contents);
-       drm_printf(p, "\tRING_START: 0x%08x\n", snapshot->reg.ring_start);
-       drm_printf(p, "\tRING_START_UDW: 0x%08x\n",
-                  snapshot->reg.ring_start_udw);
+       drm_printf(p, "\tRING_START: 0x%016llx\n", snapshot->reg.ring_start);
        drm_printf(p, "\tRING_HEAD: 0x%08x\n", snapshot->reg.ring_head);
        drm_printf(p, "\tRING_TAIL: 0x%08x\n", snapshot->reg.ring_tail);
        drm_printf(p, "\tRING_CTL: 0x%08x\n", snapshot->reg.ring_ctl);

diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index 5f4b67acba991a2fc083ab76423a37e9bef1bfb8..b2f64b92a636298d5b54215d305a83678ba09ba3 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -188,9 +188,7 @@ struct xe_hw_engine_snapshot {
                /** @reg.ring_hws_pga: RING_HWS_PGA */
                u32 ring_hws_pga;
                /** @reg.ring_start: RING_START */
-               u32 ring_start;
-               /** @reg.ring_start_udw: RING_START_UDW */
-               u32 ring_start_udw;
+               u64 ring_start;
                /** @reg.ring_head: RING_HEAD */
                u32 ring_head;
                /** @reg.ring_tail: RING_TAIL */