riscv: dts: starfive: jh7110-common: Move out some nodes to the board dts

Some node in this file are not used by the upcoming VisionFive 2 Lite
board. Move them to the board dts to prepare for adding the new
VisionFive 2 Lite device tree.

Tested-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 083ec80b4e4473e9d75218c37c64ea4d863cece6..8cfe8033305d80cbe6179ed26601ca057ee00f16 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -281,14 +281,8 @@
        assigned-clock-rates = <50000000>;
        bus-width = <8>;
        bootph-pre-ram;
-       cap-mmc-highspeed;
-       mmc-ddr-1_8v;
-       mmc-hs200-1_8v;
-       cap-mmc-hw-reset;
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins>;
-       vmmc-supply = <&vcc_3v3>;
-       vqmmc-supply = <&emmc_vdd>;
        status = "okay";
 };
 
@@ -298,8 +292,6 @@
        assigned-clock-rates = <50000000>;
        bus-width = <4>;
        bootph-pre-ram;
-       cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
-       disable-wp;
        cap-sd-highspeed;
        pinctrl-names = "default";
        pinctrl-0 = <&mmc1_pins>;

diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
index 0243e54a84ed4570a5eed7e46907046e1d4e8e09..d8db9ed4474dc0c94a6b0e51d1a5daef29d7b268 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
@@ -11,6 +11,15 @@
        compatible = "deepcomputing,fml13v01", "starfive,jh7110";
 };
 
+&mmc0 {
+       cap-mmc-highspeed;
+       cap-mmc-hw-reset;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&emmc_vdd>;
+};
+
 &mmc0_pins {
         rst-pins {
                pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
@@ -24,6 +33,11 @@
        };
 };
 
+&mmc1 {
+       cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+       disable-wp;
+};
+
 &pcie1 {
        perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>;
        phys = <&pciephy1>;

diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
index 5ca10597dcd947b9b81486b4e6b2c983cf7c5838..21873612d99312f596b39da69825e75d08ffef65 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
@@ -22,6 +22,15 @@
        status = "okay";
 };
 
+&mmc0 {
+       cap-mmc-highspeed;
+       cap-mmc-hw-reset;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&emmc_vdd>;
+};
+
 &mmc0_pins {
         rst-pins {
                pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
@@ -35,6 +44,11 @@
        };
 };
 
+&mmc1 {
+       cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+       disable-wp;
+};
+
 &pcie0 {
        status = "okay";
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts
index e568537af2c478f9031dac7098992ca2a46bbdf9..ce95496263afc48afae06b3aabf8d00cdc537ea0 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts
@@ -10,3 +10,12 @@
        model = "Milk-V Mars CM";
        compatible = "milkv,marscm-emmc", "starfive,jh7110";
 };
+
+&mmc0 {
+       cap-mmc-highspeed;
+       cap-mmc-hw-reset;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&emmc_vdd>;
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts
index 6c40d0ec40115aef35a74378d0e6bbb695fb2ef1..63aa94d65ab5538511f78e070737839127e78791 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts
@@ -14,6 +14,7 @@
 &mmc0 {
        bus-width = <4>;
        cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+       disable-wp;
 };
 
 &mmc0_pins {

diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
index 980e24e3dbc8fde88b0f377ec10d534171ce364b..aec7ae3d1f5b4d99445094510cd431ef3a2ef4ae 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
@@ -44,6 +44,15 @@
        status = "okay";
 };
 
+&mmc0 {
+       cap-mmc-highspeed;
+       cap-mmc-hw-reset;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&emmc_vdd>;
+};
+
 &mmc0_pins {
         rst-pins {
                pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
@@ -57,6 +66,11 @@
        };
 };
 
+&mmc1 {
+       cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+       disable-wp;
+};
+
 &pcie1 {
        status = "okay";
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 574e128138c20ac651ece9118302744183a134f4..edc8f45881336eb58ceebe2f9bcd4baa0d4e44c8 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -38,6 +38,12 @@
 };
 
 &mmc0 {
+       cap-mmc-highspeed;
+       cap-mmc-hw-reset;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&emmc_vdd>;
        non-removable;
 };
 
@@ -54,6 +60,11 @@
        };
 };
 
+&mmc1 {
+       cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+       disable-wp;
+};
+
 &pcie0 {
        status = "okay";
 };