arm64: dts: st: Add OMM node on stm32mp251

Add Octo Memory Manager (OMM) entry on stm32mp251 and its two
OSPI instance.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-1-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index f3c6cdfd7008c5b736ba75f5210d0eddb5b43489..bb95d61ff7b54bcbb70d981c88dfffcc1951e103 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -230,6 +230,60 @@
                        #dma-cells = <3>;
                };
 
+               ommanager: ommanager@40500000 {
+                       compatible = "st,stm32mp25-omm";
+                       reg = <0x40500000 0x400>, <0x60000000 0x10000000>;
+                       reg-names = "regs", "memory_map";
+                       ranges = <0 0 0x40430000 0x400>,
+                                <1 0 0x40440000 0x400>;
+                       clocks = <&rcc CK_BUS_OSPIIOM>,
+                                <&scmi_clk CK_SCMI_OSPI1>,
+                                <&scmi_clk CK_SCMI_OSPI2>;
+                       clock-names = "omm", "ospi1", "ospi2";
+                       resets = <&rcc OSPIIOM_R>,
+                                <&scmi_reset RST_SCMI_OSPI1>,
+                                <&scmi_reset RST_SCMI_OSPI2>;
+                       reset-names = "omm", "ospi1", "ospi2";
+                       access-controllers = <&rifsc 111>;
+                       power-domains = <&CLUSTER_PD>;
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+                       st,syscfg-amcr = <&syscfg 0x2c00 0x7>;
+                       status = "disabled";
+
+                       ospi1: spi@0 {
+                               compatible = "st,stm32mp25-ospi";
+                               reg = <0 0 0x400>;
+                               interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+                               dmas = <&hpdma 2 0x62 0x3121>,
+                                      <&hpdma 2 0x42 0x3112>;
+                               dma-names = "tx", "rx";
+                               clocks = <&scmi_clk CK_SCMI_OSPI1>;
+                               resets = <&scmi_reset RST_SCMI_OSPI1>,
+                                        <&scmi_reset RST_SCMI_OSPI1DLL>;
+                               access-controllers = <&rifsc 74>;
+                               power-domains = <&CLUSTER_PD>;
+                               st,syscfg-dlyb = <&syscfg 0x1000>;
+                               status = "disabled";
+                       };
+
+                       ospi2: spi@1 {
+                               compatible = "st,stm32mp25-ospi";
+                               reg = <1 0 0x400>;
+                               interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+                               dmas = <&hpdma 3 0x62 0x3121>,
+                                      <&hpdma 3 0x42 0x3112>;
+                               dma-names = "tx", "rx";
+                               clocks = <&scmi_clk CK_SCMI_OSPI2>;
+                               resets = <&scmi_reset RST_SCMI_OSPI2>,
+                                        <&scmi_reset RST_SCMI_OSPI2DLL>;
+                               access-controllers = <&rifsc 75>;
+                               power-domains = <&CLUSTER_PD>;
+                               st,syscfg-dlyb = <&syscfg 0x1400>;
+                               status = "disabled";
+                       };
+               };
+
                rifsc: bus@42080000 {
                        compatible = "st,stm32mp25-rifsc", "simple-bus";
                        reg = <0x42080000 0x1000>;