dt-bindings: reset: Add SCMI reset IDs for RK3588

When TF-A is used to assert/deassert the resets through SCMI, the
IDs communicated to it are different than the ones mainline Linux uses.

Import the list of SCMI reset IDs from mainline TF-A so that devicetrees
can use these IDs more easily.

Co-developed-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/include/dt-bindings/reset/rockchip,rk3588-cru.h b/include/dt-bindings/reset/rockchip,rk3588-cru.h
index e2fe4bd5f7f01569c804ae4ea87c7cf0433d2ae7..878beae6dc3baaa9a2eb46f7a81454d360968754 100644 (file)
--- a/include/dt-bindings/reset/rockchip,rk3588-cru.h
+++ b/include/dt-bindings/reset/rockchip,rk3588-cru.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
 /*
- * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
+ * Copyright (c) 2021, 2024 Rockchip Electronics Co. Ltd.
  * Copyright (c) 2022 Collabora Ltd.
  *
  * Author: Elaine Zhang <zhangqing@rock-chips.com>
@@ -753,4 +753,43 @@
 
 #define SRST_A_HDMIRX_BIU              660
 
+/* SCMI Secure Resets */
+
+/* Name=SECURE_SOFTRST_CON00,Offset=0xA00 */
+#define SCMI_SRST_A_SECURE_NS_BIU      10
+#define SCMI_SRST_H_SECURE_NS_BIU      11
+#define SCMI_SRST_A_SECURE_S_BIU       12
+#define SCMI_SRST_H_SECURE_S_BIU       13
+#define SCMI_SRST_P_SECURE_S_BIU       14
+#define SCMI_SRST_CRYPTO_CORE          15
+/* Name=SECURE_SOFTRST_CON01,Offset=0xA04 */
+#define SCMI_SRST_CRYPTO_PKA           16
+#define SCMI_SRST_CRYPTO_RNG           17
+#define SCMI_SRST_A_CRYPTO             18
+#define SCMI_SRST_H_CRYPTO             19
+#define SCMI_SRST_KEYLADDER_CORE       25
+#define SCMI_SRST_KEYLADDER_RNG                26
+#define SCMI_SRST_A_KEYLADDER          27
+#define SCMI_SRST_H_KEYLADDER          28
+#define SCMI_SRST_P_OTPC_S             29
+#define SCMI_SRST_OTPC_S               30
+#define SCMI_SRST_WDT_S                        31
+/* Name=SECURE_SOFTRST_CON02,Offset=0xA08 */
+#define SCMI_SRST_T_WDT_S              32
+#define SCMI_SRST_H_BOOTROM            33
+#define SCMI_SRST_A_DCF                        34
+#define SCMI_SRST_P_DCF                        35
+#define SCMI_SRST_H_BOOTROM_NS         37
+#define SCMI_SRST_P_KEYLADDER          46
+#define SCMI_SRST_H_TRNG_S             47
+/* Name=SECURE_SOFTRST_CON03,Offset=0xA0C */
+#define SCMI_SRST_H_TRNG_NS            48
+#define SCMI_SRST_D_SDMMC_BUFFER       49
+#define SCMI_SRST_H_SDMMC              50
+#define SCMI_SRST_H_SDMMC_BUFFER       51
+#define SCMI_SRST_SDMMC                        52
+#define SCMI_SRST_P_TRNG_CHK           53
+#define SCMI_SRST_TRNG_S               54
+
+
 #endif