gpio: dwapb: use new generic GPIO chip API

Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250825-gpio-mmio-gpio-conv-v1-9-356b4b1d5110@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 43b667b41f5dce4a1a971af4506146e4ffb59b25..0fb781ca9da29545dce23ddbdf3bd5927c714b4c 100644 (file)
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -8,6 +8,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/gpio/driver.h>
+#include <linux/gpio/generic.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
@@ -99,7 +100,7 @@ struct dwapb_gpio_port_irqchip {
 };
 
 struct dwapb_gpio_port {
-       struct gpio_chip        gc;
+       struct gpio_generic_chip chip;
        struct dwapb_gpio_port_irqchip *pirq;
        struct dwapb_gpio       *gpio;
 #ifdef CONFIG_PM_SLEEP
@@ -107,8 +108,12 @@ struct dwapb_gpio_port {
 #endif
        unsigned int            idx;
 };
-#define to_dwapb_gpio(_gc) \
-       (container_of(_gc, struct dwapb_gpio_port, gc)->gpio)
+
+static inline struct dwapb_gpio *to_dwapb_gpio(struct gpio_chip *gc)
+{
+       return container_of(to_gpio_generic_chip(gc),
+                           struct dwapb_gpio_port, chip)->gpio;
+}
 
 struct dwapb_gpio {
        struct  device          *dev;
@@ -148,19 +153,19 @@ static inline u32 gpio_reg_convert(struct dwapb_gpio *gpio, unsigned int offset)
 
 static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
 {
-       struct gpio_chip *gc    = &gpio->ports[0].gc;
-       void __iomem *reg_base  = gpio->regs;
+       struct gpio_generic_chip *chip = &gpio->ports[0].chip;
+       void __iomem *reg_base = gpio->regs;
 
-       return gc->read_reg(reg_base + gpio_reg_convert(gpio, offset));
+       return gpio_generic_read_reg(chip, reg_base + gpio_reg_convert(gpio, offset));
 }
 
 static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
                               u32 val)
 {
-       struct gpio_chip *gc    = &gpio->ports[0].gc;
-       void __iomem *reg_base  = gpio->regs;
+       struct gpio_generic_chip *chip = &gpio->ports[0].chip;
+       void __iomem *reg_base = gpio->regs;
 
-       gc->write_reg(reg_base + gpio_reg_convert(gpio, offset), val);
+       gpio_generic_write_reg(chip, reg_base + gpio_reg_convert(gpio, offset), val);
 }
 
 static struct dwapb_gpio_port *dwapb_offs_to_port(struct dwapb_gpio *gpio, unsigned int offs)
@@ -186,7 +191,7 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
 
        if (!port)
                return;
-       gc = &port->gc;
+       gc = &port->chip.gc;
 
        pol = dwapb_read(gpio, GPIO_INT_POLARITY);
        /* Just read the current value right out of the data register */
@@ -201,13 +206,13 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
 
 static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
 {
-       struct gpio_chip *gc = &gpio->ports[0].gc;
+       struct gpio_generic_chip *gen_gc = &gpio->ports[0].chip;
        unsigned long irq_status;
        irq_hw_number_t hwirq;
 
        irq_status = dwapb_read(gpio, GPIO_INTSTATUS);
        for_each_set_bit(hwirq, &irq_status, DWAPB_MAX_GPIOS) {
-               int gpio_irq = irq_find_mapping(gc->irq.domain, hwirq);
+               int gpio_irq = irq_find_mapping(gen_gc->gc.irq.domain, hwirq);
                u32 irq_type = irq_get_trigger_type(gpio_irq);
 
                generic_handle_irq(gpio_irq);
@@ -237,27 +242,27 @@ static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id)
 static void dwapb_irq_ack(struct irq_data *d)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
        u32 val = BIT(irqd_to_hwirq(d));
-       unsigned long flags;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(gen_gc);
+
        dwapb_write(gpio, GPIO_PORTA_EOI, val);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_mask(struct irq_data *d)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
-       unsigned long flags;
        u32 val;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
-       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
-       dwapb_write(gpio, GPIO_INTMASK, val);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       scoped_guard(gpio_generic_lock_irqsave, gen_gc) {
+               val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
+               dwapb_write(gpio, GPIO_INTMASK, val);
+       }
 
        gpiochip_disable_irq(gc, hwirq);
 }
@@ -265,59 +270,61 @@ static void dwapb_irq_mask(struct irq_data *d)
 static void dwapb_irq_unmask(struct irq_data *d)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
-       unsigned long flags;
        u32 val;
 
        gpiochip_enable_irq(gc, hwirq);
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(gen_gc);
+
        val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
        dwapb_write(gpio, GPIO_INTMASK, val);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_enable(struct irq_data *d)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
-       unsigned long flags;
        u32 val;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(gen_gc);
+
        val = dwapb_read(gpio, GPIO_INTEN) | BIT(hwirq);
        dwapb_write(gpio, GPIO_INTEN, val);
        val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
        dwapb_write(gpio, GPIO_INTMASK, val);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_disable(struct irq_data *d)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
-       unsigned long flags;
        u32 val;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(gen_gc);
+
        val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
        dwapb_write(gpio, GPIO_INTMASK, val);
        val = dwapb_read(gpio, GPIO_INTEN) & ~BIT(hwirq);
        dwapb_write(gpio, GPIO_INTEN, val);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static int dwapb_irq_set_type(struct irq_data *d, u32 type)
 {
        struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
        irq_hw_number_t bit = irqd_to_hwirq(d);
-       unsigned long level, polarity, flags;
+       unsigned long level, polarity;
+
+       guard(gpio_generic_lock_irqsave)(gen_gc);
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
        polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
 
@@ -352,7 +359,6 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
        dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
        if (type != IRQ_TYPE_EDGE_BOTH)
                dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        return 0;
 }
@@ -393,11 +399,12 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
                                   unsigned offset, unsigned debounce)
 {
        struct dwapb_gpio_port *port = gpiochip_get_data(gc);
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        struct dwapb_gpio *gpio = port->gpio;
-       unsigned long flags, val_deb;
+       unsigned long val_deb;
        unsigned long mask = BIT(offset);
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(gen_gc);
 
        val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
        if (debounce)
@@ -406,8 +413,6 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
                val_deb &= ~mask;
        dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb);
 
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
        return 0;
 }
 
@@ -445,7 +450,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
                                 struct dwapb_port_property *pp)
 {
        struct dwapb_gpio_port_irqchip *pirq;
-       struct gpio_chip *gc = &port->gc;
+       struct gpio_chip *gc = &port->chip.gc;
        struct gpio_irq_chip *girq;
        int err;
 
@@ -501,6 +506,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
                               struct dwapb_port_property *pp,
                               unsigned int offs)
 {
+       struct gpio_generic_chip_config config;
        struct dwapb_gpio_port *port;
        void __iomem *dat, *set, *dirout;
        int err;
@@ -519,32 +525,39 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
        set = gpio->regs + GPIO_SWPORTA_DR + pp->idx * GPIO_SWPORT_DR_STRIDE;
        dirout = gpio->regs + GPIO_SWPORTA_DDR + pp->idx * GPIO_SWPORT_DDR_STRIDE;
 
+       config = (typeof(config)){
+               .dev = gpio->dev,
+               .sz = 4,
+               .dat = dat,
+               .set = set,
+               .dirout = dirout,
+       };
+
        /* This registers 32 GPIO lines per port */
-       err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout,
-                        NULL, 0);
+       err = gpio_generic_chip_init(&port->chip, &config);
        if (err) {
                dev_err(gpio->dev, "failed to init gpio chip for port%d\n",
                        port->idx);
                return err;
        }
 
-       port->gc.fwnode = pp->fwnode;
-       port->gc.ngpio = pp->ngpio;
-       port->gc.base = pp->gpio_base;
-       port->gc.request = gpiochip_generic_request;
-       port->gc.free = gpiochip_generic_free;
+       port->chip.gc.fwnode = pp->fwnode;
+       port->chip.gc.ngpio = pp->ngpio;
+       port->chip.gc.base = pp->gpio_base;
+       port->chip.gc.request = gpiochip_generic_request;
+       port->chip.gc.free = gpiochip_generic_free;
 
        /* Only port A support debounce */
        if (pp->idx == 0)
-               port->gc.set_config = dwapb_gpio_set_config;
+               port->chip.gc.set_config = dwapb_gpio_set_config;
        else
-               port->gc.set_config = gpiochip_generic_config;
+               port->chip.gc.set_config = gpiochip_generic_config;
 
        /* Only port A can provide interrupts in all configurations of the IP */
        if (pp->idx == 0)
                dwapb_configure_irqs(gpio, port, pp);
 
-       err = devm_gpiochip_add_data(gpio->dev, &port->gc, port);
+       err = devm_gpiochip_add_data(gpio->dev, &port->chip.gc, port);
        if (err) {
                dev_err(gpio->dev, "failed to register gpiochip for port%d\n",
                        port->idx);
@@ -750,38 +763,37 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
 static int dwapb_gpio_suspend(struct device *dev)
 {
        struct dwapb_gpio *gpio = dev_get_drvdata(dev);
-       struct gpio_chip *gc    = &gpio->ports[0].gc;
-       unsigned long flags;
+       struct gpio_generic_chip *gen_gc = &gpio->ports[0].chip;
        int i;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
-       for (i = 0; i < gpio->nr_ports; i++) {
-               unsigned int offset;
-               unsigned int idx = gpio->ports[i].idx;
-               struct dwapb_context *ctx = gpio->ports[i].ctx;
+       scoped_guard(gpio_generic_lock_irqsave, gen_gc) {
+               for (i = 0; i < gpio->nr_ports; i++) {
+                       unsigned int offset;
+                       unsigned int idx = gpio->ports[i].idx;
+                       struct dwapb_context *ctx = gpio->ports[i].ctx;
 
-               offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_STRIDE;
-               ctx->dir = dwapb_read(gpio, offset);
+                       offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_STRIDE;
+                       ctx->dir = dwapb_read(gpio, offset);
 
-               offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_STRIDE;
-               ctx->data = dwapb_read(gpio, offset);
+                       offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_STRIDE;
+                       ctx->data = dwapb_read(gpio, offset);
 
-               offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_STRIDE;
-               ctx->ext = dwapb_read(gpio, offset);
+                       offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_STRIDE;
+                       ctx->ext = dwapb_read(gpio, offset);
 
-               /* Only port A can provide interrupts */
-               if (idx == 0) {
-                       ctx->int_mask   = dwapb_read(gpio, GPIO_INTMASK);
-                       ctx->int_en     = dwapb_read(gpio, GPIO_INTEN);
-                       ctx->int_pol    = dwapb_read(gpio, GPIO_INT_POLARITY);
-                       ctx->int_type   = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
-                       ctx->int_deb    = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
-
-                       /* Mask out interrupts */
-                       dwapb_write(gpio, GPIO_INTMASK, ~ctx->wake_en);
+                       /* Only port A can provide interrupts */
+                       if (idx == 0) {
+                               ctx->int_mask = dwapb_read(gpio, GPIO_INTMASK);
+                               ctx->int_en = dwapb_read(gpio, GPIO_INTEN);
+                               ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY);
+                               ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
+                               ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
+
+                               /* Mask out interrupts */
+                               dwapb_write(gpio, GPIO_INTMASK, ~ctx->wake_en);
+                       }
                }
        }
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks);
 
@@ -791,8 +803,8 @@ static int dwapb_gpio_suspend(struct device *dev)
 static int dwapb_gpio_resume(struct device *dev)
 {
        struct dwapb_gpio *gpio = dev_get_drvdata(dev);
-       struct gpio_chip *gc    = &gpio->ports[0].gc;
-       unsigned long flags;
+       struct gpio_chip *gc = &gpio->ports[0].chip.gc;
+       struct gpio_generic_chip *gen_gc = to_gpio_generic_chip(gc);
        int i, err;
 
        err = clk_bulk_prepare_enable(DWAPB_NR_CLOCKS, gpio->clks);
@@ -801,7 +813,8 @@ static int dwapb_gpio_resume(struct device *dev)
                return err;
        }
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(gen_gc);
+
        for (i = 0; i < gpio->nr_ports; i++) {
                unsigned int offset;
                unsigned int idx = gpio->ports[i].idx;
@@ -828,7 +841,6 @@ static int dwapb_gpio_resume(struct device *dev)
                        dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff);
                }
        }
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        return 0;
 }