]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amdgpu: add kicker fws loading for gfx11/smu13/psp13
authorFrank Min <Frank.Min@amd.com>
Wed, 4 Jun 2025 13:17:05 +0000 (21:17 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Jun 2025 17:09:41 +0000 (13:09 -0400)
1. Add kicker firmwares loading for gfx11/smu13/psp13
2. Register additional MODULE_FIRMWARE entries for kicker fws
   - gc_11_0_0_rlc_kicker.bin
   - gc_11_0_0_imu_kicker.bin
   - psp_13_0_0_sos_kicker.bin
   - psp_13_0_0_ta_kicker.bin
   - smu_13_0_0_kicker.bin

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit fb5ec2174d70a8989bc207d257db90ffeca3b163)
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

index e6f0b035e20b22e111a7396f6d78ae9b922cd223..c14f63cefe67392144db5e827d173b71aff1e2ee 100644 (file)
@@ -3522,8 +3522,12 @@ int psp_init_sos_microcode(struct psp_context *psp, const char *chip_name)
        uint8_t *ucode_array_start_addr;
        int err = 0;
 
-       err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, AMDGPU_UCODE_REQUIRED,
-                                  "amdgpu/%s_sos.bin", chip_name);
+       if (amdgpu_is_kicker_fw(adev))
+               err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_sos_kicker.bin", chip_name);
+       else
+               err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_sos.bin", chip_name);
        if (err)
                goto out;
 
@@ -3799,8 +3803,12 @@ int psp_init_ta_microcode(struct psp_context *psp, const char *chip_name)
        struct amdgpu_device *adev = psp->adev;
        int err;
 
-       err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, AMDGPU_UCODE_REQUIRED,
-                                  "amdgpu/%s_ta.bin", chip_name);
+       if (amdgpu_is_kicker_fw(adev))
+               err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_ta_kicker.bin", chip_name);
+       else
+               err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_ta.bin", chip_name);
        if (err)
                return err;
 
index afd6d59164bfa364e1521e5f7d5fd98328eac3ae..ec9b84f92d4670b6ac01c37fe1b4e44b7990a700 100644 (file)
@@ -85,6 +85,7 @@ MODULE_FIRMWARE("amdgpu/gc_11_0_0_pfp.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_me.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_mec.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_rlc.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_0_0_rlc_kicker.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_rlc_1.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_toc.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_1_pfp.bin");
@@ -759,6 +760,10 @@ static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
                        err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
                                                   AMDGPU_UCODE_REQUIRED,
                                                   "amdgpu/gc_11_0_0_rlc_1.bin");
+               else if (amdgpu_is_kicker_fw(adev))
+                       err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
+                                                  AMDGPU_UCODE_REQUIRED,
+                                                  "amdgpu/%s_rlc_kicker.bin", ucode_prefix);
                else
                        err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
                                                   AMDGPU_UCODE_REQUIRED,
index cfa91d709d49963dffc4684ac3ce3dcbf5e60596..cc626036ed9c3dc2e707588a31f11d39cfb1d74a 100644 (file)
@@ -32,6 +32,7 @@
 #include "gc/gc_11_0_0_sh_mask.h"
 
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_imu.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_0_0_imu_kicker.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_1_imu.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_2_imu.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_3_imu.bin");
@@ -51,8 +52,12 @@ static int imu_v11_0_init_microcode(struct amdgpu_device *adev)
        DRM_DEBUG("\n");
 
        amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
-       err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,
-                                  "amdgpu/%s_imu.bin", ucode_prefix);
+       if (amdgpu_is_kicker_fw(adev))
+               err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_imu_kicker.bin", ucode_prefix);
+       else
+               err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_imu.bin", ucode_prefix);
        if (err)
                goto out;
 
index df612fd9cc507471166fbd0fccfac8a8cc79008b..ead616c117057f86272a3ff8698c18c276df2686 100644 (file)
@@ -42,7 +42,9 @@ MODULE_FIRMWARE("amdgpu/psp_13_0_5_ta.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_8_toc.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_8_ta.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_0_sos.bin");
+MODULE_FIRMWARE("amdgpu/psp_13_0_0_sos_kicker.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_0_ta.bin");
+MODULE_FIRMWARE("amdgpu/psp_13_0_0_ta_kicker.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_7_sos.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_7_ta.bin");
 MODULE_FIRMWARE("amdgpu/psp_13_0_10_sos.bin");
index a7167668d1894484f7898cbd85fccb71dbbd20f3..1c7235935d14c5838d3c63585d632b7a35624917 100644 (file)
@@ -58,6 +58,7 @@
 
 MODULE_FIRMWARE("amdgpu/aldebaran_smc.bin");
 MODULE_FIRMWARE("amdgpu/smu_13_0_0.bin");
+MODULE_FIRMWARE("amdgpu/smu_13_0_0_kicker.bin");
 MODULE_FIRMWARE("amdgpu/smu_13_0_7.bin");
 MODULE_FIRMWARE("amdgpu/smu_13_0_10.bin");
 
@@ -92,7 +93,7 @@ const int pmfw_decoded_link_width[7] = {0, 1, 2, 4, 8, 12, 16};
 int smu_v13_0_init_microcode(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
-       char ucode_prefix[15];
+       char ucode_prefix[30];
        int err = 0;
        const struct smc_firmware_header_v1_0 *hdr;
        const struct common_firmware_header *header;
@@ -103,8 +104,13 @@ int smu_v13_0_init_microcode(struct smu_context *smu)
                return 0;
 
        amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
-       err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
-                                  "amdgpu/%s.bin", ucode_prefix);
+
+       if (amdgpu_is_kicker_fw(adev))
+               err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_kicker.bin", ucode_prefix);
+       else
+               err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s.bin", ucode_prefix);
        if (err)
                goto out;