mmips-cpus.def (74kc, [...]): Add PTF_AVOID_IMADD.

2013-03-25  Steve Ellcey  <sellcey@mips.com>

	* config/mips/mmips-cpus.def (74kc, 74kf2_1, 74kf, 74kf, 74kf1_1,
	74kfx, 74kx, 74kf3_2): Add PTF_AVOID_IMADD.
	* config/mips/mips.c (mips_option_override): Set IMADD default.
	* config/mips/mips.h (PTF_AVOID_IMADD): New.
	(ISA_HAS_MADD_MSUB): Remove MIPS16 check.
	(GENERATE_MADD_MSUB): Remove TUNE_74K check, add MIPS16 check.
	* config/mips/mips.md (mimadd): New flag for integer madd/msub.
	* doc/invoke.texi (-mimadd/-mno-imadd): New.

From-SVN: r197072

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9db06293e448e2d24daab80d091d9eeee84b8f45..fbaaaaa6b841768d818c38ed1e4c8ac509b550f6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2013-03-25  Steve Ellcey  <sellcey@mips.com>
+
+       * config/mips/mmips-cpus.def (74kc, 74kf2_1, 74kf, 74kf, 74kf1_1,
+       74kfx, 74kx, 74kf3_2): Add PTF_AVOID_IMADD.
+       * config/mips/mips.c (mips_option_override): Set IMADD default.
+       * config/mips/mips.h (PTF_AVOID_IMADD): New.
+       (ISA_HAS_MADD_MSUB): Remove MIPS16 check.
+       (GENERATE_MADD_MSUB): Remove TUNE_74K check, add MIPS16 check.
+       * config/mips/mips.md (mimadd): New flag for integer madd/msub.
+       * doc/invoke.texi (-mimadd/-mno-imadd): New.
+
 2013-03-25  Jeff Law  <law@redhat.com>
 
        * tree-ssa-dom.c (record_equivalences_from_incoming_edge): Rework

diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
index 1cc1999937346477ca5b51aa736b769fe951038e..9e5fd162189bee06e50723403ae65c368fb9e96d 100644 (file)
--- a/gcc/config/mips/mips-cpus.def
+++ b/gcc/config/mips/mips-cpus.def
@@ -121,13 +121,13 @@ MIPS_CPU ("34kfx", PROCESSOR_24KF1_1, 33, 0)
 MIPS_CPU ("34kx", PROCESSOR_24KF1_1, 33, 0)
 MIPS_CPU ("34kn", PROCESSOR_24KC, 33, 0)  /* 34K with MT but no DSP.  */
 
-MIPS_CPU ("74kc", PROCESSOR_74KC, 33, 0) /* 74K with DSPr2.  */
-MIPS_CPU ("74kf2_1", PROCESSOR_74KF2_1, 33, 0)
-MIPS_CPU ("74kf", PROCESSOR_74KF2_1, 33, 0)
-MIPS_CPU ("74kf1_1", PROCESSOR_74KF1_1, 33, 0)
-MIPS_CPU ("74kfx", PROCESSOR_74KF1_1, 33, 0)
-MIPS_CPU ("74kx", PROCESSOR_74KF1_1, 33, 0)
-MIPS_CPU ("74kf3_2", PROCESSOR_74KF3_2, 33, 0)
+MIPS_CPU ("74kc", PROCESSOR_74KC, 33, PTF_AVOID_IMADD) /* 74K with DSPr2.  */
+MIPS_CPU ("74kf2_1", PROCESSOR_74KF2_1, 33, PTF_AVOID_IMADD)
+MIPS_CPU ("74kf", PROCESSOR_74KF2_1, 33, PTF_AVOID_IMADD)
+MIPS_CPU ("74kf1_1", PROCESSOR_74KF1_1, 33, PTF_AVOID_IMADD)
+MIPS_CPU ("74kfx", PROCESSOR_74KF1_1, 33, PTF_AVOID_IMADD)
+MIPS_CPU ("74kx", PROCESSOR_74KF1_1, 33, PTF_AVOID_IMADD)
+MIPS_CPU ("74kf3_2", PROCESSOR_74KF3_2, 33, PTF_AVOID_IMADD)
 
 MIPS_CPU ("1004kc", PROCESSOR_24KC, 33, 0) /* 1004K with MT/DSP.  */
 MIPS_CPU ("1004kf2_1", PROCESSOR_24KF2_1, 33, 0)

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 4957a150078ac7f1706ff6bdf438d93a432cb6fb..d7a0749b4eecc3b1bc166b873029973c62f271ca 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -16912,6 +16912,21 @@ mips_option_override (void)
     warning (0, "the %qs architecture does not support branch-likely"
             " instructions", mips_arch_info->name);
 
+  /* If the user hasn't specified -mimadd or -mno-imadd set
+     MASK_IMADD based on the target architecture and tuning
+     flags.  */
+  if ((target_flags_explicit & MASK_IMADD) == 0)
+    {
+      if (ISA_HAS_MADD_MSUB &&
+          (mips_tune_info->tune_flags & PTF_AVOID_IMADD) == 0)
+       target_flags |= MASK_IMADD;
+      else
+       target_flags &= ~MASK_IMADD;
+    }
+  else if (TARGET_IMADD && !ISA_HAS_MADD_MSUB)
+    warning (0, "the %qs architecture does not support madd or msub"
+            " instructions", mips_arch_info->name);
+
   /* The effect of -mabicalls isn't defined for the EABI.  */
   if (mips_abi == ABI_EABI && TARGET_ABICALLS)
     {

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 0db36988dcccf55c7a50416a35ab72ed80094aba..dd694f30e5c677b96912852e5d4acf6c2ec6a751 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -47,8 +47,15 @@ extern int target_flags_explicit;
    PTF_AVOID_BRANCHLIKELY
        Set if it is usually not profitable to use branch-likely instructions
        for this target, typically because the branches are always predicted
-       taken and so incur a large overhead when not taken.  */
-#define PTF_AVOID_BRANCHLIKELY 0x1
+       taken and so incur a large overhead when not taken.
+
+   PTF_AVOID_IMADD
+       Set if it is usually not profitable to use the integer MADD or MSUB
+       instructions because of the overhead of getting the result out of
+       the HI/LO registers.  */
+
+#define PTF_AVOID_BRANCHLIKELY 0x1
+#define PTF_AVOID_IMADD                0x2
 
 /* Information about one recognized processor.  Defined here for the
    benefit of TARGET_CPU_CPP_BUILTINS.  */
@@ -874,14 +881,13 @@ struct mips_cpu_info {
                                 && !TARGET_MIPS16)
 
 /* ISA has integer multiply-accumulate instructions, madd and msub.  */
-#define ISA_HAS_MADD_MSUB      ((ISA_MIPS32                            \
-                                 || ISA_MIPS32R2                       \
-                                 || ISA_MIPS64                         \
-                                 || ISA_MIPS64R2)                      \
-                                && !TARGET_MIPS16)
+#define ISA_HAS_MADD_MSUB      (ISA_MIPS32                             \
+                                || ISA_MIPS32R2                        \
+                                || ISA_MIPS64                          \
+                                || ISA_MIPS64R2)
 
 /* Integer multiply-accumulate instructions should be generated.  */
-#define GENERATE_MADD_MSUB      (ISA_HAS_MADD_MSUB && !TUNE_74K)
+#define GENERATE_MADD_MSUB     (TARGET_IMADD && !TARGET_MIPS16)
 
 /* ISA has floating-point madd and msub instructions 'd = a * b [+-] c'.  */
 #define ISA_HAS_FP_MADD4_MSUB4  ISA_HAS_FP4

diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
index f9e88b3cd72451647382e508e3c06daf3b421c5c..e11710db3c0b0ba9ca0d8353b87173fd1b0d5751 100644 (file)
--- a/gcc/config/mips/mips.opt
+++ b/gcc/config/mips/mips.opt
@@ -58,6 +58,10 @@ mmad
 Target Report Var(TARGET_MAD)
 Use PMC-style 'mad' instructions
 
+mimadd
+Target Report Mask(IMADD)
+Use integer madd/msub instructions
+
 march=
 Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
 -march=ISA     Generate code for the given ISA

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 9b8b36a52e3a386dc4cc28d758498d27c30aafe3..3054e5c4c1223cd3ea92e30b8c80d6601bafeb87 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -766,7 +766,7 @@ Objective-C and Objective-C++ Dialects}.
 -mcheck-zero-division  -mno-check-zero-division @gol
 -mdivide-traps  -mdivide-breaks @gol
 -mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls @gol
--mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp @gol
+-mmad -mno-mad -mimadd -mno-imadd -mfused-madd  -mno-fused-madd  -nocpp @gol
 -mfix-24k -mno-fix-24k @gol
 -mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400 @gol
 -mfix-r10000 -mno-fix-r10000  -mfix-vr4120  -mno-fix-vr4120 @gol
@@ -16481,6 +16481,15 @@ This option has no effect on abicalls code.  The default is
 Enable (disable) use of the @code{mad}, @code{madu} and @code{mul}
 instructions, as provided by the R4650 ISA@.
 
+@item -mimadd
+@itemx -mno-imadd
+@opindex mimadd
+@opindex mno-imadd
+Enable (disable) use of the @code{madd} and @code{msub} integer
+instructions.  The default is @option{-mimadd} on architectures
+that support @code{madd} and @code{msub} except for the 74k 
+architecture where it was found to generate slower code.
+
 @item -mfused-madd
 @itemx -mno-fused-madd
 @opindex mfused-madd