]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: mediatek: mt7981b-openwrt-one: Enable SPI NOR
authorSjoerd Simons <sjoerd@collabora.com>
Wed, 5 Nov 2025 21:17:56 +0000 (22:17 +0100)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 6 Nov 2025 09:06:52 +0000 (10:06 +0100)
The openwrt one has a SPI NOR flash which from factory is used for:
* Recovery system
* WiFi eeprom data
* ethernet Mac addresses

Describe this following the same partitions as the openwrt configuration
uses.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts
arch/arm64/boot/dts/mediatek/mt7981b.dtsi

index 968b91f55bb27a8cb455e40acb0678287d589b16..6bb98629f453655e98a5ae11e1adaede7d1c8ea3 100644 (file)
@@ -3,6 +3,7 @@
 /dts-v1/;
 
 #include "mt7981b.dtsi"
+#include "dt-bindings/pinctrl/mt65xx.h"
 
 / {
        compatible = "openwrt,one", "mediatek,mt7981b";
        };
 };
 
+&pio {
+       spi2_flash_pins: spi2-pins {
+               mux {
+                       function = "spi";
+                       groups = "spi2";
+               };
+
+               conf-pu {
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+                       drive-strength = <8>;
+                       pins = "SPI2_CS", "SPI2_WP";
+               };
+
+               conf-pd {
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+                       drive-strength = <8>;
+                       pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+               };
+       };
+};
+
+&spi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi2_flash_pins>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <40000000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               reg = <0x00000 0x40000>;
+                               label = "bl2-nor";
+                       };
+
+                       partition@40000 {
+                               reg = <0x40000 0xc0000>;
+                               label = "factory";
+                               read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       wifi_factory_calibration: eeprom@0 {
+                                               reg = <0x0 0x1000>;
+                                       };
+
+                                       wan_factory_mac: macaddr@24 {
+                                               reg = <0x24 0x6>;
+                                               compatible = "mac-base";
+                                               #nvmem-cell-cells = <1>;
+                                       };
+                               };
+                       };
+
+                       partition@100000 {
+                               reg = <0x100000 0x80000>;
+                               label = "fip-nor";
+                       };
+
+                       partition@180000 {
+                               reg = <0x180000 0xc80000>;
+                               label = "recovery";
+                       };
+               };
+       };
+};
+
 &uart0 {
        status = "okay";
 };
index 130ce2fda39953f71b4c40427c38c2495c976d7a..f00e5bf63de35096c4eb3fe8604bd0cf895d735f 100644 (file)
                        status = "disabled";
                };
 
-               spi@11009000 {
+               spi2: spi@11009000 {
                        compatible = "mediatek,mt7981-spi-ipm", "mediatek,spi-ipm";
                        reg = <0 0x11009000 0 0x1000>;
                        interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;