i2c: designware: Remove 'cond' from i2c_dw_scl_hcnt()

The 'cond' parameter is not being used (always default, hence drop it
and hence make it consistent with i2c_dw_scl_lcnt().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>

diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
index f9889861357d5eb1938f98a6d51bdfecb54dbb7e..d0b7979c2b5d51097c09acfd14f52c0462976224 100644 (file)
--- a/drivers/i2c/busses/i2c-designware-common.c
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -407,47 +407,26 @@ static u32 i2c_dw_read_scl_reg(struct dw_i2c_dev *dev, u32 reg)
 }
 
 u32 i2c_dw_scl_hcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,
-                   u32 tSYMBOL, u32 tf, int cond, int offset)
+                   u32 tSYMBOL, u32 tf, int offset)
 {
        if (!ic_clk)
                return i2c_dw_read_scl_reg(dev, reg);
 
        /*
-        * DesignWare I2C core doesn't seem to have solid strategy to meet
-        * the tHD;STA timing spec.  Configuring _HCNT based on tHIGH spec
-        * will result in violation of the tHD;STA spec.
+        * Conditional expression:
+        *
+        *   IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf)
+        *
+        * This is just experimental rule; the tHD;STA period turned
+        * out to be proportinal to (_HCNT + 3).  With this setting,
+        * we could meet both tHIGH and tHD;STA timing specs.
+        *
+        * If unsure, you'd better to take this alternative.
+        *
+        * The reason why we need to take into account "tf" here,
+        * is the same as described in i2c_dw_scl_lcnt().
         */
-       if (cond)
-               /*
-                * Conditional expression:
-                *
-                *   IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH
-                *
-                * This is based on the DW manuals, and represents an ideal
-                * configuration.  The resulting I2C bus speed will be
-                * faster than any of the others.
-                *
-                * If your hardware is free from tHD;STA issue, try this one.
-                */
-               return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) -
-                      8 + offset;
-       else
-               /*
-                * Conditional expression:
-                *
-                *   IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf)
-                *
-                * This is just experimental rule; the tHD;STA period turned
-                * out to be proportinal to (_HCNT + 3).  With this setting,
-                * we could meet both tHIGH and tHD;STA timing specs.
-                *
-                * If unsure, you'd better to take this alternative.
-                *
-                * The reason why we need to take into account "tf" here,
-                * is the same as described in i2c_dw_scl_lcnt().
-                */
-               return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf), MICRO) -
-                      3 + offset;
+       return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
 }
 
 u32 i2c_dw_scl_lcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,
@@ -467,8 +446,7 @@ u32 i2c_dw_scl_lcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,
         * account the fall time of SCL signal (tf).  Default tf value
         * should be 0.3 us, for safety.
         */
-       return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) -
-              1 + offset;
+       return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 + offset;
 }
 
 int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev)

diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 2d32896d067346a3deced868b062fcede1933d9c..70508d082e35a827cc8db9b1b7ff2f1bfd980fe5 100644 (file)
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -329,7 +329,7 @@ struct i2c_dw_semaphore_callbacks {
 
 int i2c_dw_init_regmap(struct dw_i2c_dev *dev);
 u32 i2c_dw_scl_hcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,
-                   u32 tSYMBOL, u32 tf, int cond, int offset);
+                   u32 tSYMBOL, u32 tf, int offset);
 u32 i2c_dw_scl_lcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,
                    u32 tLOW, u32 tf, int offset);
 int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev);

diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index e8ac9a7bf0b3d232335357e2e6aac6abde4c6a1f..09e72ead51ee42705a157b9461c4f93cb5b4bfee 100644 (file)
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -71,7 +71,6 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
                                        ic_clk,
                                        4000,   /* tHD;STA = tHIGH = 4.0 us */
                                        sda_falling_time,
-                                       0,      /* 0: DW default, 1: Ideal */
                                        0);     /* No offset */
                dev->ss_lcnt =
                        i2c_dw_scl_lcnt(dev,
@@ -105,7 +104,6 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
                                                ic_clk,
                                                260,    /* tHIGH = 260 ns */
                                                sda_falling_time,
-                                               0,      /* DW default */
                                                0);     /* No offset */
                        dev->fs_lcnt =
                                i2c_dw_scl_lcnt(dev,
@@ -129,7 +127,6 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
                                        ic_clk,
                                        600,    /* tHD;STA = tHIGH = 0.6 us */
                                        sda_falling_time,
-                                       0,      /* 0: DW default, 1: Ideal */
                                        0);     /* No offset */
                dev->fs_lcnt =
                        i2c_dw_scl_lcnt(dev,
@@ -161,7 +158,6 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
                                                ic_clk,
                                                160,    /* tHIGH = 160 ns */
                                                sda_falling_time,
-                                               0,      /* DW default */
                                                0);     /* No offset */
                        dev->hs_lcnt =
                                i2c_dw_scl_lcnt(dev,