[PATCH][ARM]Fix addsi3_compare_op2 pattern.

gcc/

2015-11-12  Renlin Li  <renlin.li@arm.com>

	* config/arm/arm.md (addsi3_compare_op2): Make the order of
	assembly pattern consistent with constraint order.

From-SVN: r230222

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0b68dfaecbc008109be94604d9a2d9ee16e2db4b..db14b226ce81bee7bdfebea50dae81f54f2fe756 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-11-12  Renlin Li  <renlin.li@arm.com>
+
+       * config/arm/arm.md (addsi3_compare_op2): Make the order of
+       assembly pattern consistent with constraint order.
+
 2015-11-12  Tom de Vries  <tom@codesourcery.com>
 
        * gen-pass-instances.awk (handle_line): Simplify match regexp.

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 8ebb1bfd221e8f7f338a41b5552041f7efdb1ffd..73c308825c40184aee88cc9df42ebfc878b9fb37 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -747,8 +747,8 @@
   "TARGET_32BIT"
   "@
    adds%?\\t%0, %1, %2
-   adds%?\\t%0, %1, %2
-   subs%?\\t%0, %1, #%n2"
+   subs%?\\t%0, %1, #%n2
+   adds%?\\t%0, %1, %2"
   [(set_attr "conds" "set")
    (set_attr "type" "alus_imm,alus_imm,alus_sreg")]
 )