err |= get_host_cpu_reg(fd, ahcf, ID_ISAR6_EL1_IDX);
err |= get_host_cpu_reg(fd, ahcf, ID_MMFR4_EL1_IDX);
- err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr0,
+ err |= read_sys_reg32(fd, &ahcf->isar.mvfr0,
ARM64_SYS_REG(3, 0, 0, 3, 0));
- err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr1,
+ err |= read_sys_reg32(fd, &ahcf->isar.mvfr1,
ARM64_SYS_REG(3, 0, 0, 3, 1));
- err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr2,
+ err |= read_sys_reg32(fd, &ahcf->isar.mvfr2,
ARM64_SYS_REG(3, 0, 0, 3, 2));
err |= get_host_cpu_reg(fd, ahcf, ID_PFR2_EL1_IDX);
err |= get_host_cpu_reg(fd, ahcf, ID_DFR1_EL1_IDX);
if (pmu_supported) {
/* PMCR_EL0 is only accessible if the vCPU has feature PMU_V3 */
- err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
+ err |= read_sys_reg64(fd, &ahcf->isar.reset_pmcr_el0,
ARM64_SYS_REG(3, 3, 9, 12, 0));
}